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Keywords: Lead RTL Design Engineer - ( Mixed-Signal IPs), Location: Hyderabad, Telangana

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Lead RTL Design Engineer - ( Mixed-Signal IPs)

for Mixed-Signal IPs is responsible for developing, integrating, and verifying digital RTL blocks within mixed-signal subsystems... integration of mixed-signal IPs into complex SoCs. Key Responsibilities Develop synthesizable, high-quality RTL for mixed...

Company: Silicon Labs
Posted Date: 15 Nov 2025

Lead DFT Engineer

for testing other parts of the design, including memory, mixed-signal, I/Os, custom LBISTs & MBISTs, IEEE1149.1 JTAG and IEEE1687..._ Lead DFT Engineer THE ROLE: Lead DFT engineer will lead strong engineering team on Scan, MBIST, iJTAG test development...

Posted Date: 21 Sep 2025

Staff Engineer - AMS Verification

verification. Responsibilities: To work in AMS Verification domain with relevant experience in mixed signal SOCs or subsystems.../Synopsys/Mentor tools Knowledge of digital design techniques, Verilog HDL, and standard RTL coding styles, as well as analog...

Company: Silicon Labs
Posted Date: 15 Nov 2025