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Keywords: ASIC/RTL Design engineer, Location: Bangalore, Karnataka

Page: 4

Wifi Mac design engineer-Sr Staff

General Summary: 12+ years experience in Digital ASIC / Processor Design - Strong fundamentals in core areas... to execute on a complex project for a large modem design in advanced process nodes - Work closely with RTL, DFT and PD leads...

Company: Qualcomm
Posted Date: 29 Jun 2025

Senior Design Engineer - Memory Subsystem

, implement in RTL, and deliver a fully verified, synthesis/timing clean design. You will work with architects, other designers... be doing: Own micro-architecture and RTL development of design modules. Micro-architect features to meet performance, power...

Company: Nvidia
Posted Date: 27 Jun 2025

Senior Staff Design Engineer

to 12years. Must be strong in scripting using Perl/Python Must be familiar with RTL design for ASIC development using... for RTL design for integration of IO pads into SoC, building the required multiplexing logic and necessary power control...

Company: Infineon
Posted Date: 25 Jun 2025

Senior Staff Design Engineer

to 12years. Must be strong in scripting using Perl/Python Must be familiar with RTL design for ASIC development using... for RTL design for integration of IO pads into SoC, building the required multiplexing logic and necessary power control...

Company: Infineon
Posted Date: 25 Jun 2025

Senior Engineer Design

Must be familiar with RTL design for ASIC development using Verilog. Must be familiar with LINT (LEDA/Spyglass),Clock-Domain-Crossing... manner) Candidate will be responsible for RTL design for integration of IO pads into SoC, building the required multiplexing...

Company: Infineon
Posted Date: 25 Jun 2025

Senior Staff Engineer, Physical Design

at Marvell. Key responsibilities include: Work with design teams across various disciplines such as Digital/RTL/Analog... with RTL design teams to drive assembly and design closure. Provide technical direction, coaching, and mentoring to junior...

Company: Marvell
Posted Date: 22 Jun 2025

Staff Engineer, Physical Design

with the RTL design team to drive modifications that address congestion and timing issues. Additionally, your involvement... and execution, Marvell’s custom Processor/ASIC solution offers a differentiated approach with a best-in-class portfolio of data...

Company: Marvell
Posted Date: 21 Jun 2025

DSP / NPU Design Verification Sr Engineer

-8 years experience in processor/ASIC design verification · Solid background and understanding of Digital Design... General Summary: Job Summary: · Position for 5-8 years of experience in design verification of complex Qualcomm propriety...

Company: Qualcomm
Posted Date: 12 Jun 2025

Principal Engineer - Physical Design

, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. Your Team, Your Impact This position is with ASIC design..., collaborating closely with the RTL design team to drive modifications that address congestion and timing issues. Collaboration...

Company: Marvell
Posted Date: 28 May 2025

Senior Staff Engineer - Physical Design

, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. Your Team, Your Impact This position is with ASIC design..., collaborating closely with the RTL design team to drive modifications that address congestion and timing issues. Collaboration...

Company: Marvell
Posted Date: 28 May 2025

MTS Silicon Design Engineer

’ experience in ASIC Design Verification, with strong knowledge of x86/ARM Computer Architecture/Micro-Architecture. Solid... background and understanding of Digital Design, RTL design and strong troubleshooting, analytical and debugging skills...

Posted Date: 22 May 2025

BT - Design Verification Sr Lead Engineer

colleagues. The candidate will work with design team on RTL debug during Pre-silicon HW development phase. Skills/Experience... is looking for experienced Wireless HW design verification engineers to work on Qualcomm’s best in class chipsets for mobile phones, wearables...

Company: Qualcomm
Posted Date: 16 May 2025

Senior Staff Engineer-Physical Design

. You will play a crucial role in developing and implementing timing and logic ECOs, collaborating closely with the RTL design team... and execution, Marvell’s custom Processor/ASIC solution offers a differentiated approach with a best-in-class portfolio of data...

Company: Marvell
Posted Date: 14 May 2025

Senior Digital Design Engineer

/Electronics/Computer science 4 - 8 years of digital logic design and hands-on RTL coding experience using Verilog... & Trace, TZC, SMPU, SPU) and their integration requirements Package Digital IP for seamless integration into design flow...

Posted Date: 11 May 2025

Senior Digital Design Engineer

/Electronics/Computer science 4 - 8 years of digital logic design and hands-on RTL coding experience using Verilog... & Trace, TZC, SMPU, SPU) and their integration requirements Package Digital IP for seamless integration into design flow...

Posted Date: 08 May 2025

BT - Design Verification Engineer (Multiple Levels)

colleagues. The candidate will work with design team on RTL debug during Pre-silicon HW development phase. Skills/Experience... is looking for experienced Wireless HW design verification engineers to work on Qualcomm’s best in class chipsets for mobile phones, wearables...

Company: Qualcomm
Posted Date: 23 Apr 2025

Senior Principal Engineer, IP Design

-end (preferably RTL Verilog and VHDL based) design and methodologies Self-driven and capable for independent work... cross function Design, Verification, Validation and supporting SW/FW teams. Own the complete design of one or more cutting...

Posted Date: 12 Apr 2025

IP/SOC Design Lead - GFX Engineering

_ MTS SILICON DESIGN ENGINEER THE ROLE: The focus of this role is to plan, build, and execute the verification of new... for GFXIP projects Own and lead design quality for GFXIP projects Engage with IP and SOC teams to drive closure to IP RTL...

Posted Date: 15 Jun 2025

SoC Design Verification Lead

_ MTS SILICON DESIGN ENGINEER (AECG ASIC - SoC Design Verification Lead) THE ROLE: The focus of this role is to plan...: Proficient in SoC/sub-system/IP level ASIC verification Proficient in debugging firmware and RTL code using simulation tools...

Posted Date: 08 May 2025

PE Logic Design

an exceptional PE Logic Design Engineer to join our MIC IDC Design team in Bengaluru. In this role, you will be working... Design Engineer, you’ll play a pivotal role in designing and implementing the world’s best Registered Clocking Driver (RCD...

Company: Rambus
Posted Date: 05 May 2025