Find your dream job NOW!

Click on Location links to filter by Job Title & Location.
Click on Company links to filter by Company & Location.
For exact match, enclose search terms in "double quotes".

Keywords: CPU RTL Design Engineer, Location: Austin, TX

Page: 2

CPU Performance Modeling Engineer

and maintain features and sections of the CPU architectural performance model Work with RTL and design team to assess...Proficiency in one or more areas of CPU architecture: fetch, decode, branch prediction, renaming, execute units, SIMD...

Company: Qualcomm
Location: Austin, TX
Posted Date: 02 Mar 2026

CPU Data Engineer

formats (such as XML or relational databases) that can be consumed by verification (DV), design (RTL), architecture..., and documentation teams and associated tools. The engineer will act as a bridge between architecture/design teams and DV teams, ensuring...

Location: Austin, TX
Posted Date: 06 Feb 2026

CPU DV Infrastructure Engineer

Collaborate with both CAD and front-end design teams in productizing solutions to enable faster and more nimble... development. Develop and maintain flows, scripts and systems around the RTL and Verification development work cycle like RTL...

Company: Qualcomm
Location: Austin, TX
Posted Date: 02 Mar 2026

Design Verification Lead Engineer

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. Design... Verification Lead Engineer Role Overview: The Lead DV Engineer focuses on the execution and technical management of verification...

Location: Austin, TX
Posted Date: 14 Jan 2026

Silicon Design Engineer

your career. SILICON DESIGN ENGINEER THE ROLE: Are you passionate about pushing the boundaries of power efficiency and high...-frequency computing? As a part of our AMD physical design central methodology team, you can help define timing, power...

Location: Austin, TX
Posted Date: 07 Mar 2026

Staff GPU Design Verification Engineer - Subsystems

Job Title: Staff GPU Design Verification Engineer - Subsystems Position Description: Protingent Staffing... has an exciting contract Staff GPU Design Verification Engineer - Subsystems with our client located in Austin, TX...

Company: Protingent
Location: Austin, TX
Posted Date: 19 Feb 2026

Clocking Design Engineer

Job Details: Job Description: We are seeking a highly skilled Clocking Design Engineer to join our dynamic team... integration, RTL, circuits, validation, design automation team and EDA vendors, in a high-paced atmosphere. Key Responsibilities...

Company: Intel
Location: Austin, TX
Posted Date: 31 Jan 2026

Sr Physical and Digital Design Engineer (2026 New College Graduate)

physical design using Place and Route tools for PPA benchmarking of industry wide used CPU cores using GF technologies... using industry standard tools for place and route on CPU cores RTL analysis and simulation of the cores to ensure correct...

Company: GlobalFoundries
Location: Austin, TX
Posted Date: 16 Jan 2026

Principal Verification Lead Engineer

. Principal Verification Lead Engineer Role Overview: The Lead DV Engineer focuses on the execution and technical management... of verification projects. You will lead a focused team to ensure comprehensive test coverage and closure for specific CPU cores...

Location: Austin, TX
Posted Date: 14 Jan 2026

Formal Verification Engineer - New College Grad 2026

As a Formal Verification Engineer at NVIDIA, you will verify the design and implementation of the industry's leading..., define the verification scope, and ensure design correctness. You will employ advanced formal techniques to obtain...

Company: Nvidia
Location: Austin, TX
Posted Date: 12 Feb 2026
Salary: $100000 - 166750 per year

DFx Engineer

of people around the world. Come build with us! Role and Responsibilities As a seasoned DFx engineer, you will be involved... SOC-level interface, clock design, and support of various test/debug modes. You close on the spec with stakeholders...

Company: Samsung
Location: Austin, TX
Posted Date: 06 Feb 2026

Infinity Fabric Verification Staff Engineer

engineer to help verify our configurable switches and die-to-die interconnect. Infinity Fabric is part of every new AMD product... preferred candidate will have proven experience verifying complex design blocks at the IP or SoC level using SystemVerilog/UVM...

Location: Austin, TX
Posted Date: 24 Jan 2026

Power Analysis and Optimization Engineer

of experience in dynamic and leakage power estimation and reduction at architecture/RTL/block synthesis and circuit design level..., we are building a better tomorrow. Who We Are Become part of the cutting-edge E-Core microprocessor design team focused...

Company: Intel
Location: Austin, TX
Posted Date: 23 Jan 2026

Principal Infinity Fabric Verification Engineer

engineer to help verify our configurable switches and die-to-die interconnect. Infinity Fabric is part of every new AMD product... preferred candidate will have proven experience verifying complex design blocks at the IP or SoC level using SystemVerilog/UVM...

Location: Austin, TX
Posted Date: 16 Jan 2026

Principal Engineer, RISCV Architect

scheduling, and vector execution. Design & Development: Lead the RTL development of CPU cores, ensuring alignment with power... in CPU/SoC architecture and RTL design. RISC-V Expertise: Thorough knowledge of the RISC-V ISA, including standard...

Location: Austin, TX
Posted Date: 11 Mar 2026

Emulation Engineer

You Are Your responsibilities are as follows but not limited to: Builds emulation and FPGA models and solutions from RTL design using synthesis... projects, execute random instruction tests on these models, debug failures and find CPU bugs. We collaborate closely with CPU...

Company: Intel
Location: Austin, TX
Posted Date: 26 Feb 2026

Senior Software Engineer(VIP)

in RTL design, IP/VIP development/verification or emulation experience with industry leadership. Good level of SV, UVM...Looking for Siemens EDA ambassadors: Siemens EDA is a global technology leader in Electronic Design Automation...

Company: Siemens
Location: Austin, TX
Posted Date: 13 Feb 2026
Salary: $129600 - 233300 per year

Senior Emulation Methodology Engineer

/GPU architecture and protocols such as PCIe, DRAM, Ethernet, AMBA, or CXL. Background in RTL design, verification... readiness across RTL validation, debugging, and pre-/post-silicon workflows. You will partner closely with engineering leaders...

Location: Austin, TX
Posted Date: 30 Jan 2026