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Keywords: DDR Lead Verification Engineer, Location: Bangalore, Karnataka

Page: 2

R&D Engineering, Sr Staff Engineer - Design Verification/ VIP Verification Engineers

Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the... technological innovation. You Are: As an experienced Verification Engineer, you are passionate about ensuring the highest...

Company: Synopsys
Posted Date: 30 Jan 2026

Principal Engineer-High Speed Interface Pre-Silicon Validation/Verification

Date Posted 06/11/2025 Job Title: Principal Engineer-High Speed Interface Pre-Silicon Validation/Verification... Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the...

Company: Synopsys
Posted Date: 30 Jan 2026

Principal Engineer-High Speed Interface Pre-Silicon Validation/Verification

Date Posted 06/11/2025 Job Title: Principal Engineer-High Speed Interface Pre-Silicon Validation/Verification... Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the...

Company: Synopsys
Posted Date: 30 Jan 2026

Applications Engineer, Emulation and Verification

, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation... innovation. You Are: A Hardware-Assisted Verification Expert with deep knowledge of IP interfaces such as PCIe and DDR...

Company: Synopsys
Posted Date: 30 Jan 2026

SOC Verification Engineer: Security DV

your career. SENIOR SILICON DESIGN ENGINEER THE ROLE (SOC Verification Engineer: Security DV ): Work on SOC level..., AXI, PCIe, DDR, memory controller etc. Comfortable with design/verification tools and flows like VCS, Verdi, SOC...

Posted Date: 10 Dec 2025

Design Verification Senior Principal Engineer

, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. Your Team, Your Impact About Marvell Marvell... is a place to thrive, learn, and lead. Your Team, Your Impact Marvell Data Centre Engineering (DCE) - Compute & Storage (CCS...

Company: Marvell
Posted Date: 16 Nov 2025

Design Verification Senior Principal Engineer

, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. Your Team, Your Impact Marvell Data Centre Engineering (DCE.../Career solutions including the CXL product line. What You Can Expect Lead End-to-End SoC DV execution and sign-off...

Company: Marvell
Posted Date: 11 Nov 2025

Architect- ASIC Verification IP Development

Engineer with a passion for developing functional verification solutions for RTL based IP Cores. You are experienced....Multikeywordfacets-Hardware"> Join our Talent Community! . Find Jobs For Where? Search Jobs Architect- ASIC Verification IP...

Company: Synopsys
Posted Date: 30 Jan 2026

IP Design Technical Lead/ Staff ASIC RTL Design Engineer

/2025 Job Title: IP Design Technical Lead/ Staff ASIC RTL Design Engineer We Are: At Synopsys, we drive the...-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high...

Company: Synopsys
Posted Date: 30 Jan 2026

IP Design Technical Lead/ Staff ASIC RTL Design Engineer

/2026 Job Title: IP Design Technical Lead/ Staff ASIC RTL Design Engineer We Are: At Synopsys, we drive the...-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high...

Company: Synopsys
Posted Date: 30 Jan 2026

Lead Product Engineer

Engineer – Memory IP Products Join a growing and dynamic IP team and help lead the proliferation of best-in-class Memory PHY... on development and support of high-performance IP related to memory protocols such as DDR/LPDDR/HBM/GDDR, and to engage with the...

Posted Date: 22 Jan 2026

Lead Product Engineer

. Job Title: Lead Product Engineer Location: Bangalore About Us Cadence is a pivotal leader in electronic design, building... Overview Join a growing and dynamic IP team and help lead the development of best in class digital and mixed signal IP...

Posted Date: 14 Jan 2026

DV Lead Engineer

Job Requirements Job Summary: We are looking for a highly skilled and hands on Lead Engineer to lead and drive... or more High-Speed Interface Verification ( PCIE/USB/Ethernet/DDR*) Optional Preferred Skills Exposure to Formal Verification...

Company: Quest Global
Posted Date: 20 Dec 2025

SoC Validation Engineer, Senior/Lead(with expertise in Power and Clock)

Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical... Candidates from power or clock or DDR background will be ideal for this position. Principal Duties and Responsibilities...

Company: Qualcomm
Posted Date: 10 Jan 2026

DDRPHY Senior Staff/Staff/ Lead Digital Design Engineer

Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical... for linting, clock-domain crossing, conformal low power and DFT rules. Work with functional verification team on test-plan...

Company: Qualcomm
Posted Date: 07 Jan 2026

Lead RTL Design Engineer

, and Interface with verification/validation teams to ensure design quality and robustness. Build strong collaboration with other R...&D teams such as Verification, digital IP, Design Enablement, Emulation, and Validation to achieve project milestones. Promote...

Posted Date: 30 Dec 2025

Silicon - Performance Analysis Lead/Staff Engineer

and drive the development of post-silicon verification test plans for units in DDR, Cache controllers Collaboratively work...

Company: Qualcomm
Posted Date: 29 Nov 2025

Lead - Pre-Silicon Validation & Emulation

your career. SMTS SYSTEMS DESIGN ENGINEER THE ROLE: We are looking for a dynamic, energetic Lead / Principal Systems Design... Engineer to join our growing team. As a key contributor to the success of AMD’s product, you will be part of a leading team...

Posted Date: 24 Jan 2026

Lead-FPGA/RTL Design

is looking for a passionate Lead-FPGA/RTL Design engineer to develop reliable, robust and reusable RTL modules for satellite payload..., which is capable of image acquisition and edge processing, aimed at Space Situational Awareness (SSA). The Lead engineer...

Company: Digantara
Posted Date: 21 Jan 2026

PHY Digital Lead

, Security, and Networking. What You Can Expect As a Principal Design Engineer, you will lead micro-architecture and RTL..., above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. Your Team, Your Impact As a Digital IC Design Principal...

Company: Marvell
Posted Date: 19 Dec 2025