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Keywords: DFT Engineer, Location: USA

Page: 16

Cellular SoC Static Timing Analysis Engineer

engineer, you will be responsible for all aspects of timing including, working with designers for timing constraints generation..., helping construct/modify flows, timing analysis and timing closure. Description As an ASIC STA Engineer...

Company: Apple
Location: San Diego, CA
Posted Date: 30 Oct 2025

DDR Design Engineer

Engineer. As a member of our multifaceted group, you will have the rare and great opportunity to craft upcoming products... outstanding PHY designs for high-performance, low power applications. As a logic design engineer, you will be involved...

Company: Apple
Location: Austin, TX
Posted Date: 30 Oct 2025

Cellular SoC Static Timing Analysis Engineer

engineer, you will be responsible for all aspects of timing including, working with designers for timing constraints generation..., helping construct/modify flows, timing analysis and timing closure. Description As an ASIC STA Engineer...

Company: Apple
Location: San Diego, CA
Posted Date: 30 Oct 2025

Sr. PCBA Failure Engineer

your career. THE ROLE: As a PCBA Failure Analysis Engineer, you will play a critical role in diagnosing, isolating... recommendations for Design for Manufacturability (DFM) and Design for Testability (DFT) to enhance product reliability...

Location: Austin, TX
Posted Date: 29 Oct 2025

CPU Gate Level Synthesis Engineer

groundbreaking Apple products! Apple's Silicon Engineering Group (SEG) is looking for a hardworking engineer for our CPU Gate Level..., power and area. Description As a CPU Gate Level Synthesis Engineer, you will drive the early-stage development of high...

Company: Apple
Location: Santa Clara, CA
Posted Date: 29 Oct 2025

Senior ASIC Design Engineer – Clocks IP

ASIC engineer to join the team. The Team is responsible for crafting all aspects of GPU and CPU clocking. The team..., we deliver clock RTL information to GPU, CPU and SOC verification team, timing and DFT teams. Get involved in end-to-end cycle...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 29 Oct 2025

System Software Engineer - DFX Software

We are now looking for a Systems Software Engineer. Do you like to think creatively and enjoy solving challenges... from the crowd: Knowledge of Design for Test (DFT) including fault models, ATPG, and fault simulation Familiarity...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 29 Oct 2025

ATE Test Engineer

We are looking for a creative ATE Test Engineer. NVIDIA has continuously reinvented itself for three decades... Engineering, DFT, and IC design to efficiently debug product failures and implement optimal solutions. Write and maintain...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 27 Oct 2025
Salary: $100000 - 166750 per year

CPU Physical Design Engineer

, multiple power domain analysis, structured placement, routing, synthesis, and DFT. Works intimately with industry EDA vendors...

Company: Intel
Location: Austin, TX
Posted Date: 24 Jan 2026

Senior Electrical Engineer

Familiarity with PSPICE Design for Manufacturing (DFM) and Design for Testability (DFT) Analog and digital circuit design Hands...

Company: Fortive
Location: Irvine, CA
Posted Date: 24 Jan 2026

Summer Intern - Digital Design Engineer

Skills and Qualifications Knowledge of Design-for-Test (DFT) methodologies, including scan insertion and test coverage...

Company: Cirrus Logic
Location: Austin, TX
Posted Date: 23 Jan 2026

Sr. Electrical Engineer - Control Systems

-for-Manufacturing (DFM) and Design-for-Test (DFT) Work cooperatively across all engineering disciplines, such as software, systems...

Location: Merrimack, NH
Posted Date: 23 Jan 2026

Senior Electrical Test Engineer

and system-level hardware. Perform PCB schematic design and layout, including component selection, routing, and DFM/DFT...

Location: Arden Hills, MN
Posted Date: 23 Jan 2026
Salary: $85000 per year

Sr. ASIC Design Engineer, Amazon Leo

support logic · Configure, instantiate and integrate 3rd party IP blocks · Understand low power design & the impact of DFT...

Company: Amazon
Location: Austin, TX
Posted Date: 23 Jan 2026

Sr. ASIC Design Engineer, Amazon Leo

support logic · Configure, instantiate and integrate 3rd party IP blocks · Understand low power design & the impact of DFT...

Company: Amazon
Location: Austin, TX
Posted Date: 23 Jan 2026

Electrical Engineer II

) and design for test (DFT) activities. Hand-on individual contributor throughout the development process including schematic...

Company: Mercury Systems
Location: Cypress, CA
Posted Date: 23 Jan 2026

Senior ASIC Design Engineer, Amazon Leo

meets DFT, timing and power targets by working closely with the implementation team · Learn about requirements...

Company: Amazon
Location: San Diego, CA
Posted Date: 23 Jan 2026

ECAD Engineer

in Altium Design Analog Digital & Mixed Signal Layout Design DFM / DFT Design for Manufacturability & Testing About ApTask...

Company: ApTask
Location: Wilson, NC
Posted Date: 22 Jan 2026
Salary: $90000 - 105000 per year

Senior Electrical Test Engineer

and system‑level hardware. Perform PCB schematic design and layout, including component selection, routing, and DFM/DFT...

Location: Arden Hills, MN
Posted Date: 22 Jan 2026
Salary: $85000 per year

Senior ASIC Timing Engineer

and timing convergence, such as CPUs, GPUs or Network processor implementation or SOCs. Understanding of DFT logic... and experience with DFT timing closure for various modes e.g., scan shift and capture, transition faults, BIST, etc. Knowledge...

Company: Nvidia
Location: Westford, MA
Posted Date: 22 Jan 2026