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Keywords: DFT Lead, Location: Bangalore, Karnataka

Page: 3

Sr Staff Test Engineer

for PMIC, Temp Sensor and I3C applications. Participate in testability reviews with DFT/DFM teams to enhance yield and test..., Temp Sensors and I3C products. Test Lead experience preferred. 10+ Years of experience on mFLEX, Advantest 93K, SPEA...

Posted Date: 11 Oct 2025

Sr Staff Test Engineer

for PMIC, Temp Sensor and I3C applications. Participate in testability reviews with DFT/DFM teams to enhance yield and test..., Temp Sensors and I3C products. Test Lead experience preferred. 10+ Years of experience on mFLEX, Advantest 93K, SPEA...

Posted Date: 11 Oct 2025

Sr Staff Test Engineer

. Design test hardware for PMIC, Temp Sensor and I3C applications. Participate in testability reviews with DFT/DFM teams... Sort and Final Test for PMIC, Temp Sensors and I3C products. Test Lead experience preferred. 10+ Years of experience...

Posted Date: 11 Oct 2025

Senior Enterprise Project/Program Manager(SaaS)

and value realization. Key Responsibilities Enterprise Program & Project Leadership: Lead the end-to-end implementation... to optimize solution effectiveness. Workstream Leadership: Independently lead workstreams, mentor team members, and manage...

Company: Locus
Posted Date: 10 Oct 2025

Technologist Engineer, ASIC Development Engineering (Validation)

engineers working on the development of advanced controller SoCs. As a SoC Validation Lead, you will be responsible... validation flows, including planning, execution, and closure. Leadership & Mentorship: Lead and mentor junior/mid-level...

Company: SanDisk
Posted Date: 10 Oct 2025

Staff Engineer, Test Product Development

location. The candidate will successfully lead the Product & Test Engineering (PTE) activities for the development of mixed... phase of the product development through all phases of silicon development from DFT to silicon bring up / characterization...

Posted Date: 08 Oct 2025

Senior Technologist, ASIC Development Engineering

where your technical expertise and strategic vision will drive projects from concept to mass production. Key Responsibilities: Lead...: Partner with SoC Design, Verification, Validation, DFT, Physical Design, Mixed-Signal IP, Foundry, Hardware, Firmware...

Company: SanDisk
Posted Date: 07 Oct 2025

Staff Engineer, Test Product Development

location. The candidate will successfully lead the Product & Test Engineering (PTE) activities for the development of mixed... phase of the product development through all phases of silicon development from DFT to silicon bring up / characterization...

Posted Date: 07 Oct 2025

Principal Engineer, ASIC Development Engineering (STA)

teams, including design, verification, physical design, and DFT, to ensure seamless integration and optimal timing... of experience in Static Timing Analysis. - Proven track record of successfully executing STA & Own STA signoff - Lead complete...

Company: SanDisk
Posted Date: 04 Oct 2025

PMTS Silicon Design Engineer

global DFX engineering teams across AMD. THE ROLE We are seeking a highly skilled and experienced DFT Engineering Lead... or Manager to lead a Design-for-Test team in developing and implementing advanced DFT IP and design methodologies for complex...

Posted Date: 01 Oct 2025

Principal Digital Design Engineer

in India and seeking a Principal Digital IC Design Engineer to lead the development of advanced digital subsystems.../SystemVerilog, Ethernet protocols, PHY layer design, and/or networking SoCs Strong understanding of DFT, Timing constraints, UPF...

Company: onsemi
Posted Date: 28 Sep 2025

Senior Staff Engineer-STA(Synthesis)

) at block and SoC level designs. Define and evaluate constraints and signoff Test/DFT mode timing requirements. Knowledge.... Has done timing sign-off including timing margin calculations independently, hands-on STA lead of projects. Experience in handling...

Company: Infineon
Posted Date: 27 Sep 2025

Senior Test Manager

Design-for-Test (DFT) requirements and partner with design teams to ensure optimal test coverage. Lead the creation of test... production, and collaborative development processes. The successful candidate will lead a test team, working closely with design...

Posted Date: 20 Sep 2025

CPU/Core/Processor RTL Design Architect

crossing, Linting aspects of the overall design of the IP and the subsystem. Work closely with DFT, Physical Design and SOC... of the design features Lead design team from all aspects of the RTL deliverables. Mentor the junior members of the RTL team...

Posted Date: 14 Sep 2025

Associate III - VLSI SVP -CD

of RTL Design/Module and provide support to junior engineers in Verification/PD/DFT/Circuit Design/Analog Layout/STA... and on-time On time quality delivery approved by the project lead/manager Measures of Outcomes: * Quality –verified using...

Company: UST
Posted Date: 13 Sep 2025

Associate III - VLSI IO Design

of RTL Design/Module and provide support to junior engineers in Verification/PD/DFT/Circuit Design/Analog Layout/STA... and on-time On time quality delivery approved by the project lead/manager Measures of Outcomes: * Quality –verified using...

Company: UST
Posted Date: 13 Sep 2025

Sr. SOC level verification -GDP (PCIE,USB,Ethernet ) Engineer

for verifying and integration. Add on responsibility SOC Integration after having co-ordination with IPs, SOC (Design, DFT & PD... with customer, team members, lead and come up with testplan, code testcases, checkers, UVM agents, scoreboards and assertions...

Posted Date: 09 Sep 2025

Sr. Staff Engineer - Physical Design

, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. Your Team, Your Impact This position is with ASIC design... candidate with 10+ years of hands-on experience and leadership in Physical Design. Should have played a PD lead role with 8...

Company: Marvell
Posted Date: 24 Aug 2025

Associate III - VLSI Analog Layout

of RTL Design/Module and provide support to junior engineers in Verification/PD/DFT/Circuit Design/Analog Layout/STA... and on-time On time quality delivery approved by the project lead/manager Measures of Outcomes: * Quality –verified using...

Company: UST
Posted Date: 15 Aug 2025

Associate II - VLSI SC Char

of VLSI Frontend Backend or Analog design under minimal supervison from the Lead Outcomes: * As an Individual contributor... work on any one task of RTL Design/Module in Verification/PD/DFT/Circuit Design/Analog Layout/STA/Synthesis/Design Checks...

Company: UST
Posted Date: 15 Aug 2025