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Keywords: Design Engineer/ RTL Engineer, Location: USA

Page: 12

Senior Staff – Physical Design Engineer, CAD Tools and Methodologies

by millions around the world. Come build with us! Role and Responsibilities As a CAD Engineer specializing in Low-Power Tools... & Methodology, you’ll join the Physical Design organization at the core of GPU IP development. The CAD/Methodology team supports...

Company: Samsung
Location: Austin, TX
Posted Date: 14 May 2025

Digital Design Engineer

As a Digital Design Engineer at Meta Reality Labs, you will work with a world-class group of researchers and engineers... Engineer Responsibilities Responsible for top-level or block level µArchitecture definition and design of Computer Vision...

Company: Meta
Location: USA
Posted Date: 14 May 2025

Principal Systems Design Engineer (DSP)

in the smart home, industrial IoT, and smart cities markets. Learn more at . Principal Systems Design Engineer (DSP... Systems Engineer you will serve as a technical leader shaping the PHY/MAC architecture across Silicon Labs’ wireless IoT...

Company: Silicon Labs
Location: Austin, TX
Posted Date: 10 May 2025
Salary: $157150 per year

Logic and Digital Circuit Design Engineer - New College Grad 2025

We are now hiring for a Logic and Digital Circuit Design Engineer! NVIDIA has continuously reinvented itself over two... closure. In addition to RTL design, you'll need to understand the analog schematics and write SystemVerilog models...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 09 May 2025

Senior Staff ASIC Design Engineer, Neural Processor

, is looking for an experienced and talented Senior Staff ASIC Design Engineer to take on a critical role with expansive responsibilities and play... a leading role in enhancing the Hardware Engineering in a growing organization. As Digital ASIC Design Engineer...

Company: Syntiant
Location: Irvine, CA
Posted Date: 08 May 2025
Salary: $165000 - 185000 per year

VLSI Physical Design Integration Engineer - New College Grad 2025

, to amplify human inventiveness and intelligence. NVIDIA is seeking an outstanding VLSI Physical Design Integration Engineer who...-end teams to resolve connectivity issues and implement design fixes to ensure physically-viable RTL netlists are delivered...

Company: Nvidia
Location: Westford, MA
Posted Date: 08 May 2025
Salary: $96000 - 184000 per year

Senior ASIC Design Engineer

NVIDIA is seeking an outstanding Senior ASIC Design Engineer to design and implement the world’s leading SoC's and GPU.... A deep understanding of ASIC design flow including RTL design, verification, logic synthesis, timing analysis, ECO, and post...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 03 May 2025

VLSI Physical Design Engineer - New College Grad 2025

, to amplify human inventiveness and intelligence. NVIDIA is seeking an outstanding VLSI Physical Design Engineer who... fixes to ensure physically-viable RTL netlists are delivered to downstream physical design flows. Run synthesis workflows...

Company: Nvidia
Location: Westford, MA
Posted Date: 02 May 2025
Salary: $96000 - 184000 per year

Senior ASIC Design Engineer

to multipoint wireless products. Architecture and micro-architecture of digital subsystems RTL design of digital circuits using..., and Interface IPs Chip level integration and verification RTL design and integration of large functional blocks in the modem...

Company: Tarana Wireless
Location: Milpitas, CA
Posted Date: 01 May 2025

Design Verification Engineer

design verification engineer. As a member of our wide-ranging group, you will have the outstanding and great opportunity... to craft upcoming products that will delight and encourage millions of Apple's customers every day. We are looking for a Design...

Company: Apple
Location: San Diego, CA
Posted Date: 26 Apr 2025
Salary: $115700 - 174200 per year

ASIC Design Engineer - Design & Timing Constraints

in multiple timing modes. Option to also do block level RTL design or block or top-level IP integration. Helping develop... level SDCs and clocking diagrams and mentor other RTL design owners on SDC development. Creating fullchip clocking diagrams...

Company: Cisco Systems
Location: San Jose, CA
Posted Date: 24 Apr 2025

ASIC Design Engineer - Pixel IP

a critical impact getting functional products to millions of customers quickly. Description As an ASIC Design Engineer in the... experience Preferred Qualifications Experience in IP/SoC front-end ASIC RTL digital logic design using Verilog and System...

Company: Apple
Location: Cupertino, CA
Posted Date: 23 Apr 2025

DDR Design Engineer

Design Engineer. As a member of our dynamic group, you will have the rare and rewarding opportunity to craft upcoming.... We provide best-in-class PHY designs for high-performance, low power applications. As a logic design engineer...

Company: Apple
Location: Austin, TX
Posted Date: 23 Apr 2025

Senior Design Engineer, Coherent High Speed Interconnect

NVIDIA is looking for a Senior Design Engineer for our Coherent High Speed Interconnect team! For two decades, NVIDIA... and knowledge in architecture, RTL design, performance analysis and power optimization. Strong working knowledge of Verilog...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 23 Apr 2025

ASIC Design Engineer - Pixel IP

a critical impact getting functional products to millions of customers quickly. Description As an ASIC Design Engineer in the... experience Preferred Qualifications Experience in IP/SoC front-end ASIC RTL digital logic design using Verilog and System...

Company: Apple
Location: Cupertino, CA
Posted Date: 23 Apr 2025

ASIC Design Verification Engineer

Job Description: ASIC Design Verification Engineer Technical Lead I – VLSI Who We Are: Born digital, UST... engineer with strong background in digital design verification. You thrive in a collaborative environment, working directly...

Company: UST
Location: Oregon
Posted Date: 22 Apr 2025
Salary: $87000 - 131000 per year

STA Design Engineer (Static Timing Analysis)

_ THE ROLE: AMD is looking for an ASIC Design STA engineer to contribute to the development of large SoCs, featuring... improvements and early issue detection during the design phase. PREFERRED EXPERIENCE: Worked with EDA tools that enable RTL...

Posted Date: 20 Apr 2025

DDR Design Engineer

Design Engineer. As a member of our dynamic group, you will have the rare and rewarding opportunity to craft upcoming.... We provide best-in-class PHY designs for high-performance, low power applications. As a logic design engineer...

Company: Apple
Location: Austin, TX
Posted Date: 20 Apr 2025

FPGA Design Engineer

semiconductor industry to the Midwest! We need a FPGA Programming Design Engineer on our growing Ann Arbor team to assist... requirements. Responsible for RTL design and verification, as well as hardware bring-up. Implement logic/control blocks...

Company: KLA Corporation
Location: Ann Arbor, MI
Posted Date: 20 Apr 2025
Salary: $91900 - 156200 per year

ASIC/SoC Design Verification Engineer | MRL Consulting

Senior SoC Verification Engineer - Montreal, QC Full-time | Complex SoC Projects | Hybrid Work Model We're... applications. They are seeking a Senior SoC Verification Engineer to lead functional verification from test planning to tape-out...

Company: MRL Group
Location: California
Posted Date: 19 Apr 2025