Find your dream job NOW!

Click on Location links to filter by Job Title & Location.
Click on Company links to filter by Company & Location.
For exact match, enclose search terms in "double quotes".

Keywords: Design Lead - RTL Design, Location: India

Page: 11

Wireless R&D IP Verification Lead Engineer, Senior

Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical..., including: Design analysis and verification planning. Developing test benches and writing test cases using SystemVerilog/UVM...

Company: Qualcomm
Posted Date: 11 Dec 2025

Technical Lead I - VLSI

Backend or Analog design with minimal supervision Outcomes: * Work as an individual contributor owning any one task of RTL... needed to execute the project Knowledge Examples: Knowledge of project(s) in any of the design by executing – RTL Design...

Company: UST
Posted Date: 04 Dec 2025

Senior Lead Engineer

Job Requirements Role Overview We are seeking a highly motivated and skilled SoC RTL Integration & Design Sign-off... design adheres to the defined power strategy through comprehensive RTL VCLP (Voltage/Current Leakage Power) checks and low...

Company: Quest Global
Posted Date: 26 Nov 2025

CPU Emulation Sr Lead Engineer

Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical... with all disciplines of CPU team to help verify and validate high performance CPUs. Role and Responsibilities Work closely with CPU RTL...

Company: Qualcomm
Posted Date: 23 Nov 2025

SOC Verification Lead Engineer

verification of new and existing features for AMD’s graphics processor IP, resulting in no bugs in the final design. THE PERSON...: You have a passion for modern, complex processor architecture, digital design, and verification in general. You are a team player who...

Posted Date: 16 Nov 2025

Si GPU Functional Debug Engineer(Senior/Lead/Staff)

debug architecture of GPU core. Preferred Qualifications 4 to 10 years of experience working in RTL Design (Micro... Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical...

Company: Qualcomm
Posted Date: 08 Nov 2025

GPU Functional Verification Sr Engineer/Sr Lead/Staff Engineer

Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical... bench, own test plan, debug all RTL artefacts, and achieve all signoff matrices Engage with EDA vendors, explore new...

Company: Qualcomm
Posted Date: 08 Nov 2025

Si GPU Functional Debug (Compute) - Sr Lead Engineer

debug architecture of GPU core. Preferred Qualifications 5+ years of experience working in RTL Design (Micro... Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical...

Company: Qualcomm
Posted Date: 06 Nov 2025

ASIC Verification- Staff Engineer

,-age,-military-veteran-status,-or-disability. /span /p custom_fields.CareerAreas-ASIC-Digital-Design custom_fields....SubCategory-ASIC-Digital-Design custom_fields.EmployeeStatus-Employee custom_fields.unposting_date-2027-01-29 custom_fields...

Company: Synopsys
Posted Date: 01 Feb 2026

Technical Director

Job Requirements Role Summary: Lead global physical design competency development and turnkey SoC implementation.... Drive talent skilling, recruitment, and delivery enablement while architecting advanced-node RTL-to-GDSII flows. Balance...

Company: Quest Global
Posted Date: 31 Jan 2026

Staff AI/ML Validation Engineer

and using AMD different profiler/debugger tools. Work directly with architecture, RTL, and design teams to influence fixes... your career. MTS SOFTWARE SYSTEM DESIGN ENGINEER THE ROLE: We are looking for a Staff-level GPU Compute / AI Validation...

Posted Date: 31 Jan 2026

ASIC Verification- Staff Engineer

,-age,-military-veteran-status,-or-disability. /span /p custom_fields.CareerAreas-ASIC-Digital-Design custom_fields....SubCategory-ASIC-Digital-Design custom_fields.EmployeeStatus-Employee custom_fields.unposting_date-2027-01-28 custom_fields...

Company: Synopsys
Posted Date: 31 Jan 2026

Staff Digital Engineer

digital logic design. Key Responsibilities Lead RTL design and micro-architecture development for memory interface digital... (MID) Business Unit. In this role, you will lead the micro-architecture and design of high-performance chips...

Posted Date: 30 Jan 2026

Sr Staff Engineer, STA/Synthesis

. Implement timing closure strategies, including ECOs, buffer insertion, and cell sizing. Collaborate with RTL, Physical Design... Timing Analysis (STA). This role involves driving RTL-to-gate-level implementation, timing closure, and optimization...

Posted Date: 30 Jan 2026

Staff Digital Engineer

Responsibilities Lead RTL design and micro‑architecture development for memory interface digital blocks and subsystems. Own end..., you will lead the micro-architecture and design of high‑performance chips for next‑generation memory interface products...

Posted Date: 30 Jan 2026

Senior Staff /Principal DFT Engineer - Solutions Engineering

. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design... with deep expertise in Design-for-Test (DFT) RTL coding and pattern generation, backed by more than a decade of hands...

Company: Synopsys
Posted Date: 30 Jan 2026

Staff Application Engineer

, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation... to verify RTL designs, identify corner-case bugs, and collaborate closely with design and validation teams to execute Formal...

Company: Synopsys
Posted Date: 30 Jan 2026

Principal ASIC Digital Verification Engineer- IP Development

to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance...,-age,-military-veteran-status,-or-disability. /span /p custom_fields.CareerAreas-ASIC-Digital-Design custom_fields...

Company: Synopsys
Posted Date: 30 Jan 2026

Applications Engineering, Sr Staff Engineer

Staff AI Methodology Engineer Principal EDA Solutions Engineer AI-Driven RTL-to-GDS Flow Specialist Lead Application.... Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design...

Company: Synopsys
Posted Date: 30 Jan 2026

Applications Engineering, Principal Engineer

Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the... simulation/verification, RTL synthesis, floorplanning, physical design, and timing closure. Hands-on expertise in integration...

Company: Synopsys
Posted Date: 30 Jan 2026