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Keywords: Formal Verification Lead, Location: Bangalore, Karnataka

Page: 2

SMMU Design Verification Engineer(Senior/lead)

signatures and identifying bug fixes Developing/Deploying scripts/tools for validation (Certitude, VC Formal, Fishtail) Debug...

Company: Qualcomm
Posted Date: 30 Jan 2026

LPASS Design Verification Senior Lead Engineer

innovative DV methodologies (formal, simulation and emulation based) to continuously push the quality and efficiency of test...

Company: Qualcomm
Posted Date: 29 Jan 2026

SMMU Senior Lead Design Verification Engineer

(Certitude, VC Formal, Fishtail) Debug and root cause post silicon issues in collaboration with Design, SW and test teams Work...

Company: Qualcomm
Posted Date: 28 Dec 2025

ASIC Design Verification Engineer | UVM | Exp. 8+ years

. Experience with Veloce/Palladium/Zebu/HAPS. Formal verification (iev/vc formal) knowledge. Demonstrated ability... some of the most sophisticated ASICs being developed in the industry. You will engage in dynamic collaboration with verification...

Company: Cisco Systems
Posted Date: 06 Feb 2026

Staff Design Verification Engineer

Strategic Leadership: Architect and lead verification strategy for complex digital and mixed-signal designs, acting as a key... using advanced verification methodologies to ensure design accuracy Post-Silicon Support: Lead post-silicon validation...

Posted Date: 06 Feb 2026

Staff Design Verification Engineer

Strategic Leadership: Architect and lead verification strategy for complex digital and mixed-signal designs, acting as a key... using advanced verification methodologies to ensure design accuracy Post-Silicon Support: Lead post-silicon validation...

Posted Date: 06 Feb 2026

Design Verification Engineer II

to: Verify/validate silicon or IP to address complex challenges. Take the lead in functional verification of advanced IP or ASIC... Scripting language such as Python, Ruby or Perl. Experience with the use of formal verification methods Experience in Assembly...

Company: Microsoft
Posted Date: 01 Feb 2026

ASIC Verification- Staff Engineer

productivity. Contribute to the development and refinement of verification methodologies, including VIP development and formal...; exposure to formal verification is highly desirable. Solid understanding of protocols such as MIPI-I3C/UFS/Unipro, AMBA, SD...

Company: Synopsys
Posted Date: 01 Feb 2026

ASIC Verification- Staff Engineer

productivity. Contribute to the development and refinement of verification methodologies, including VIP development and formal...; exposure to formal verification is highly desirable. Solid understanding of protocols such as MIPI-I3C/UFS/Unipro, AMBA, SD...

Company: Synopsys
Posted Date: 31 Jan 2026

RTL Design & Verification Engineer (R&D Engineering, Sr Engineer)

, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation...-on experience in RTL design and verification. Proficiency in EDA tools, Verilog, System Verilog, TCL scripting, and Formal...

Company: Synopsys
Posted Date: 30 Jan 2026

RTL Design & verification (R&D Engineering, Saff Engineer)

, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation...-on experience in RTL design and verification. Proficiency in EDA tools, Verilog, System Verilog, TCL scripting, and Formal...

Company: Synopsys
Posted Date: 30 Jan 2026

RTL Design & verification (R&D Engineering, Saff Engineer)

, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation...-on experience in RTL design and verification. Proficiency in EDA tools, Verilog, System Verilog, TCL scripting, and Formal...

Company: Synopsys
Posted Date: 30 Jan 2026

RTL Design & Verification Engineer (R&D Engineering, Sr Engineer)

, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation...-on experience in RTL design and verification. Proficiency in EDA tools, Verilog, System Verilog, TCL scripting, and Formal...

Company: Synopsys
Posted Date: 30 Jan 2026

RTL Design & Verification Engineer (R&D Engineering, Sr Engineer)

, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation...-on experience in RTL design and verification. Proficiency in EDA tools, Verilog, System Verilog, TCL scripting, and Formal...

Company: Synopsys
Posted Date: 30 Jan 2026

R&D Engineering, Sr Staff Engineer (RTL Design & Verification)

, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation... and verification. Proficiency in EDA tools, Verilog, System Verilog, TCL scripting, and Formal Verification methodologies. Experience...

Company: Synopsys
Posted Date: 30 Jan 2026

Staff Design Verification Engineer

Strategic Leadership: Architect and lead verification strategy for complex digital and mixed-signal designs, acting as a key... using advanced verification methodologies to ensure design accuracy Post-Silicon Support: Lead post-silicon validation...

Posted Date: 29 Jan 2026

Staff Design Verification Engineer

Strategic Leadership: Architect and lead verification strategy for complex digital and mixed-signal designs, acting as a key... using advanced verification methodologies to ensure design accuracy Post-Silicon Support: Lead post-silicon validation...

Posted Date: 29 Jan 2026

Staff Design Verification Engineer

Strategic Leadership: Architect and lead verification strategy for complex digital and mixed-signal designs, acting as a key... using advanced verification methodologies to ensure design accuracy Post-Silicon Support: Lead post-silicon validation...

Posted Date: 29 Jan 2026

ASIC Design Verification Engineer | UVM | Exp- 8+ Years

Qualifications Experience with Forwarding logic/Parsers/P4. Experience with Veloce/Palladium/Zebu/HAPS. Formal verification (iev... some of the most sophisticated ASICs being developed in the industry. You will engage in dynamic collaboration with verification...

Company: Cisco Systems
Posted Date: 26 Jan 2026

Senior Custom SOC IP Verification Engineer

of what is possible today and define the platform for the future of computing. What you'll be doing: Lead ASIC design verification for various...NVIDIA needs a Senior Custom SOC/IP Verification Engineer for next-gen solutions. Seeking hard-working individuals...

Company: Nvidia
Posted Date: 22 Jan 2026