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Keywords: IP Design Verification Engineer, Location: Santa Clara, CA

Page: 2

Principal Analog Mixed-Signal IC Design Engineer

etc. to meet key performance targets and performing design verification using industry standard tools such as SPICE, Spectre..., above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. Your Team, Your Impact As an Analog IC Design Principal...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 05 Feb 2026

Senior Physical Design Engineer - Circuits

We are now looking for a Senior Physical Design Engineer in our Circuits Solutions Group! NVIDIA has been redefining... of physical design and implementation of custom macros for GPU and other ASICs targeted at the desktop, laptop, workstation...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 25 Jan 2026

Senior Digital Design Engineer

We are looking for a Senior Digital Design Engineer to join our Semi-Custom Silicon products group. In this role.... What you'll be doing: As a key member of the NVLink Fusion design team, you will analyze the architectural requirements, perform...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 23 Jan 2026

ASIC Design Engineer, GPU/ML Shader Core

your career. THE ROLE: We are looking for a ASIC Design Engineer, GPU/ML Shader Core who are motivated to challenge the status... of ASIC design flow including RTL design, verification, logic synthesis and timing analysis. Exposure to Digital systems...

Posted Date: 19 Dec 2025

Staff Engineer, Analog IC Design

-Signal IC Design Engineer, you will be part of a key team designing highly sophisticated CMOS transceiver/SERDES products... etc. to meet key performance targets and performing design verification using industry standard tools such as Spectre, MATLAB...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 10 Dec 2025
Salary: $118900 - 178100 per year

Digital IC Principal Design Engineer

functionality. Collaborate with verification engineer to develop exhaustive test cases to ensure successful design. Work closely... Engineer at Marvell, you will be a member of the Custom Compute Solution IP development team. This team develops uniquely high...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 02 Dec 2025
Salary: $146850 - 220000 per year

ASIC/RTL Design Engineer

Design. Knowledge AND hand-on experience from industry ASIC design flow including RTL coding, IP Integration, debugging...Duration: 6 months Job Duties: The work will expose the designer to a number of IP including ARM cores, Ethernet...

Location: Santa Clara, CA
Posted Date: 23 Jan 2026

Design Engineer - Sensors

devices. Job activities span the ASIC design process from specification definition, high-level design, coding and verification... and route, timing and power use, and verification or similarly for custom circuit design/layout flow. • Utilizes tools...

Company: Qualcomm
Location: Santa Clara, CA
Posted Date: 18 Jan 2026

Senior ASIC RTL Design Engineer

. As a member of the front-end design/integration team, you will work closely with the architecture, IP design, Physical Design... processor architecture, digital design as well as verification/design quality. You are a team player who has excellent...

Posted Date: 26 Dec 2025

Principal Interconnect Micro-architect and RTL Design Engineer

and performance/power. In this role the candidate will work with IP and SOC Architecture team, RTL design team, verification team... and design Work closely with Design teams for Area and Floorplan refinement, Verification Test plan reviews, Timing targets...

Posted Date: 16 Dec 2025

Senior Principal Engineer, Physical Design

experience in back-end physical design and verification, including significant leadership roles Proven track record of leading... infrastructure intellectual property (IP) and a wide array of flexible business models. In this unique role, you’ll have the...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 13 Dec 2025

Analog Design Engineer

and timing analysis, and reliability checks. Interface with cross-functional teams like RTL, Verification and Physical Design... of key IP in Digital and Analog/Mixed-Signal domains catering to AMD products across multiple business units. With a good mix...

Posted Date: 08 Dec 2025

Senior Staff Engineer, Physical Design

verification) using industry standard EDA tools Work with RTL design teams to drive assembly and design closure. Provide... infrastructure intellectual property (IP) and a wide array of flexible business models. In this unique role, you’ll have the...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 06 Dec 2025
Salary: $124420 - 186400 per year

Senior Engineer, Physical Design

infrastructure intellectual property (IP) and a wide array of flexible business models. In this unique role, you’ll have the... opportunity to work on both the physical design and methodology for future designs of our next-generation, high-performance...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 06 Dec 2025
Salary: $89360 - 133900 per year

Senior SRAM Circuit Design Engineer

. We are looking for you. You will work on the design and development of our next generation of custom SRAM design. As part of the Digital IP Team, work..., and develop in-house design and verification flows for SRAM design that would be used on all the NVIDIA products. What you'll...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 20 Nov 2025

Senior Layout Mask Design Engineer

of our next generation custom SRAM design. As part of the Digital IP Team, you will work with other team members on the new process design... and verifying against design rules and schematics. Perform power robustness check and EMIR verification and fixes Negotiation...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 20 Nov 2025
Salary: $124000 - 195500 per year

Senior Principal Product Engineer

in ASIC/SoC design or verification. Strong hands-on experience with SystemVerilog, UVM, SVA, and verification testbench... building verification IP, reference flows, or internal test frameworks. Prior involvement in competitive displacement or proof...

Company: Siemens
Location: Santa Clara, CA
Posted Date: 12 Feb 2026

FPGA Prototyping Engineer

: You have a passion for modern, complex processor architecture, digital design, and verification in general. You are a team player who.../HAPS platforms across AMD’s next-generation silicon programs. You will collaborate closely with architecture, RTL design...

Posted Date: 03 Feb 2026

Formal Equivalence Checking Methodology Engineer

performance bottlenecks Provide training and support to IP teams on formal verification methodologies, tools, and standard... Formal Equivalence Checking Methodology Engineer to join our VLSI team. This team is responsible for developing, maintaining...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 29 Jan 2026

GPU Next-Gen Architecture Modeling Engineer

features, to improve the graphics architecture. The AM Engineer is responsible for the gathering of requirements, design... initiative, where we have a faster functional model and driver stack to facilitate our architecture analysis and IP verification...

Posted Date: 17 Jan 2026