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Keywords: IP Verification Lead, Location: Bangalore, Karnataka

Page: 7

Senior Staff to Principal Engineer - ESD Design

, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. Your Team, Your Impact As a Digital IC Design Senior Staff..., Central Engineering is the center hub providing IP to be used by all the other spokes on that wheel, including Automotive...

Company: Marvell
Posted Date: 30 Aug 2025

Senior DFT Engineer

DESCRIPTION The team that built the innovative Silicon IP AZ1 Neural Edge that is powering the latest generation.... Make history. We are seeking a seasoned and strategic Sr DFT Engineer to Lead end-to-end Design-for-Test (DFT) planning...

Company: Amazon
Posted Date: 30 Aug 2025

Staff E-TAC Engineer

We lead with personalization and choice in all of our people programs. We have disrupted the traditional view... professionals. You will regularly not just participate in, but lead technical discussions with cross-functional teams, creating...

Posted Date: 20 Aug 2025

Associate III - VLSI Mem Design

of RTL Design/Module and provide support to junior engineers in Verification/PD/DFT/Circuit Design/Analog Layout/STA... and on-time On time quality delivery approved by the project lead/manager Measures of Outcomes: * Quality –verified using...

Company: UST
Posted Date: 15 Aug 2025

Associate II - VLSI SC Char

of VLSI Frontend Backend or Analog design under minimal supervison from the Lead Outcomes: * As an Individual contributor... work on any one task of RTL Design/Module in Verification/PD/DFT/Circuit Design/Analog Layout/STA/Synthesis/Design Checks...

Company: UST
Posted Date: 15 Aug 2025

Associate III - VLSI SRAM ACD

of RTL Design/Module and provide support to junior engineers in Verification/PD/DFT/Circuit Design/Analog Layout/STA... and on-time On time quality delivery approved by the project lead/manager Measures of Outcomes: * Quality –verified using...

Company: UST
Posted Date: 15 Aug 2025

Associate III - VLSI Analog Layout

of RTL Design/Module and provide support to junior engineers in Verification/PD/DFT/Circuit Design/Analog Layout/STA... and on-time On time quality delivery approved by the project lead/manager Measures of Outcomes: * Quality –verified using...

Company: UST
Posted Date: 15 Aug 2025

Senior Principal Design Engineer

, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. Your Team, Your Impact Marvell Compute and Custom Solutions... with a best-in-class portfolio of data infrastructure intellectual property (IP) and a wide-array of flexible business models...

Company: Marvell
Posted Date: 15 Aug 2025

Principal Engineer AMS SoC Architect

about analog clocking topics for internal stakeholders such as analog development groups, project management or verification teams.... You will provide analog technical guidance to peers as part of a lead role with a holistic view of the chip. You will support peers...

Company: Infineon
Posted Date: 10 Aug 2025

Associate III - VLSI ML

of RTL Design/Module and provide support to junior engineers in Verification/PD/DFT/Circuit Design/Analog Layout/STA... and on-time On time quality delivery approved by the project lead/manager Measures of Outcomes: * Quality –verified using...

Company: UST
Posted Date: 08 Aug 2025

Associate III - VLSI IO

of RTL Design/Module and provide support to junior engineers in Verification/PD/DFT/Circuit Design/Analog Layout/STA... and on-time On time quality delivery approved by the project lead/manager Measures of Outcomes: * Quality –verified using...

Company: UST
Posted Date: 08 Aug 2025

Pre and Post Silicon Validation Engineer

_ MTS SILICON DESIGN ENGINEER Technical 8+ years of experience in Pre & post silicon IP or SOC Validation Working..., ensuring quality and performance. Lead and mentor a team of developers/engineers, fostering technical excellence...

Posted Date: 08 Aug 2025

Staff Digital Design Engineer

in India and seeking a Staff Digital Design Engineer to lead the micro-architecture and implementation of advanced digital... closure Experience with analog IP integration and cross-domain collaboration Familiarity with automotive standards...

Company: onsemi
Posted Date: 07 Aug 2025

Control Engineer

grit. But at ABB, you’ll never run alone. Run what runs the world. This Position reports to: CONTROL TEAM LEAD... to contract specifications. You will also showcase your expertise by contributing to design reviews and design verification...

Company: ABB
Posted Date: 06 Aug 2025

Associate II - VLSI

of VLSI Frontend Backend or Analog design under minimal supervison from the Lead Outcomes: * As an Individual contributor... work on any one task of RTL Design/Module in Verification/PD/DFT/Circuit Design/Analog Layout/STA/Synthesis/Design Checks...

Company: UST
Posted Date: 03 Aug 2025

Principal Engineer - SOC Clocking

with RTL, physical design, verification, and DFT teams to deliver end-to-end SoC clocking and custom IP. Own the technical...Job Details: Job Description: Key Responsibilities: Lead the architecture, design, and integration of SoC-wide...

Company: Intel
Posted Date: 03 Aug 2025

Associate II - VLSI

BU. You will be responsible for verification of various IP’s and/or SoC. Candidate must be self-motivated and capable of working independently... of VLSI Frontend Backend or Analog design under minimal supervison from the Lead Outcomes: * As an Individual contributor...

Company: UST
Posted Date: 03 Aug 2025

Associate III - VLSI

in SoC verification and debugging SoC-level issues 6. Ability to own IP/subsystem integration verification at the SoC level..., from verification planning to coverage closure Skills: Soc Verification,IP/System Integration,C code About Company: UST...

Company: UST
Posted Date: 03 Aug 2025

Associate III - VLSI

of RTL Design/Module and provide support to junior engineers in Verification/PD/DFT/Circuit Design/Analog Layout/STA... and on-time On time quality delivery approved by the project lead/manager Measures of Outcomes: * Quality –verified using...

Company: UST
Posted Date: 03 Aug 2025

Associate III - VLSI

of RTL Design/Module and provide support to junior engineers in Verification/PD/DFT/Circuit Design/Analog Layout/STA... and on-time On time quality delivery approved by the project lead/manager Measures of Outcomes: * Quality –verified using...

Company: UST
Posted Date: 03 Aug 2025