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Keywords: Lead Engineer Analog and Mixed Signal Design, Location: Bangalore, Karnataka

Page: 2

Senior Principal ASIC Architecture verification Engineer

integrated radio-frequency (RF), analog, digital, and mixed-signal semiconductor solutions for access and connectivity, wired...Responsibilities MaxLinear is seeking Senior Staff ASIC Verification Lead Engineer to work from our Bangalore, India...

Company: MaxLinear
Posted Date: 26 Sep 2025

Senior Principal Engineer

handling Experience with mixed-signal (analog+digital) control and monitoring, PID/feedback loop control, etc. Experience... Architecture, Design, Development, and Testing of embedded C firmware for controlling our extremely complicated DSP HW Taking lead...

Company: Marvell
Posted Date: 21 Aug 2025

Associate II - VLSI DFTN

of VLSI Frontend Backend or Analog design under minimal supervison from the Lead Outcomes: * As an Individual contributor... DFT Floorplan Clocks P&R STA Extraction Physical Verificatione. Knowledge in Soft / Hard / Mixed Signal IP Design...

Company: UST
Posted Date: 14 Oct 2025

Associate II - VLSI DFT

of VLSI Frontend Backend or Analog design under minimal supervison from the Lead Outcomes: * As an Individual contributor... DFT Floorplan Clocks P&R STA Extraction Physical Verificatione. Knowledge in Soft / Hard / Mixed Signal IP Design...

Company: UST
Posted Date: 14 Oct 2025

Associate II - VLSI SC Char

of VLSI Frontend Backend or Analog design under minimal supervison from the Lead Outcomes: * As an Individual contributor... DFT Floorplan Clocks P&R STA Extraction Physical Verificatione. Knowledge in Soft / Hard / Mixed Signal IP Design...

Company: UST
Posted Date: 15 Aug 2025

Associate II - VLSI

of VLSI Frontend Backend or Analog design under minimal supervison from the Lead Outcomes: * As an Individual contributor... DFT Floorplan Clocks P&R STA Extraction Physical Verificatione. Knowledge in Soft / Hard / Mixed Signal IP Design...

Company: UST
Posted Date: 03 Aug 2025

Associate II - VLSI

of VLSI Frontend Backend or Analog design under minimal supervison from the Lead Outcomes: * As an Individual contributor... DFT Floorplan Clocks P&R STA Extraction Physical Verificatione. Knowledge in Soft / Hard / Mixed Signal IP Design...

Company: UST
Posted Date: 03 Aug 2025