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Keywords: Lead RTL Design Engineer, Location: Bangalore, Karnataka

Page: 8

ASIC Verification- Staff Engineer

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Company: Synopsys
Posted Date: 01 Feb 2026

ASIC Verification- Staff Engineer

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Company: Synopsys
Posted Date: 31 Jan 2026

Staff Digital Engineer

digital logic design. Key Responsibilities Lead RTL design and micro-architecture development for memory interface digital...Job Description We are seeking a highly skilled Staff Digital Design Engineer to join our Memory Interface Devices...

Posted Date: 30 Jan 2026

Staff Digital Engineer

Responsibilities Lead RTL design and micro‑architecture development for memory interface digital blocks and subsystems. Own end.... Job Description We are seeking a highly skilled Staff Digital Design Engineer to join our Memory Interface Devices (MID) Business Unit. In this role...

Posted Date: 30 Jan 2026

ASIC Verification, Principal Engineer

Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the... technological innovation. You Are: You are an experienced and innovative ASIC Digital Design Principal Engineer with a passion...

Company: Synopsys
Posted Date: 30 Jan 2026

Staff EDA Applications Engineer

EDA Applications Engineer Senior ASIC Application Consultant AI-Enabled Design Solutions Engineer Physical Design... to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance...

Company: Synopsys
Posted Date: 30 Jan 2026

Principal ASIC Digital Verification Engineer- IP Development

to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance...,-age,-military-veteran-status,-or-disability. /span /p custom_fields.CareerAreas-ASIC-Digital-Design custom_fields...

Company: Synopsys
Posted Date: 30 Jan 2026

Applications Engineering, Principal Engineer

Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the... simulation/verification, RTL synthesis, floorplanning, physical design, and timing closure. Hands-on expertise in integration...

Company: Synopsys
Posted Date: 30 Jan 2026

Staff ASIC Engineer – DFT

, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation... closely with RTL and Verification teams to ensure DFT requirements are integrated early in the design cycle. Analyze...

Company: Synopsys
Posted Date: 30 Jan 2026

Applications Engineering. Staff Engineer

, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation... prototyping or emulation of complex, multi-million-gate SoCs. Strong proficiency in Verilog, System Verilog, RTL design...

Company: Synopsys
Posted Date: 30 Jan 2026

Senior Staff /Principal DFT Engineer - Solutions Engineering

. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design... with deep expertise in Design-for-Test (DFT) RTL coding and pattern generation, backed by more than a decade of hands...

Company: Synopsys
Posted Date: 30 Jan 2026

Applications Engineering, Principal Engineer

Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the... should include ASIC design using industry-standard tools (Placement, Optimization, CTS, Routing) RTL to GDSII full flow experience...

Company: Synopsys
Posted Date: 30 Jan 2026

Applications Engineering, Sr Staff Engineer

Staff AI Methodology Engineer Principal EDA Solutions Engineer AI-Driven RTL-to-GDS Flow Specialist Lead Application.... Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design...

Company: Synopsys
Posted Date: 30 Jan 2026

Staff DFT Engineer

, MBIST, boundary scan, and test access strategies Drive testability requirements early in the RTL design phase Balance... Work closely with: RTL designers Physical design (PD) Functional verification Product engineering and manufacturing...

Posted Date: 29 Jan 2026

Senior Syn/STA Engineer

About the Role As a Senior Digital Design Engineer, you will lead block-level digital design synthesis and STA efforts. You'll..., ADI ensures today's innovators stay Ahead of What's Possible™. Learn more at and on and . Senior Digital Design Engineer...

Posted Date: 29 Jan 2026

ASIC DFT Engineer - 4 to 8 Yrs

with a primary focus on Design-for-Test. You will work with DFT Lead, Front-end RTL teams, backend physical design teams... in the RTL. Work closely with the design/design-verification and PD teams to enable the integration and validation of the...

Company: Cisco Systems
Posted Date: 26 Jan 2026

GPU Verification Engineer

, and interpersonal skills. Working with all partners such as lead architects and block design teams to understand features.... Must have ASIC design knowledge and be able to debug Verilog RTL code using simulation/emulation tools and do test plan, test...

Posted Date: 22 Jan 2026

Power, Performance & Silicon Modeling Engineer

your career. UPFM Support: Senior SILICON DESIGN ENGINEER The goal of AMD’s Unified Power Flow Methodology (UPFM...) is to establish and scale best practices for power intent definition and power-aware design across RTL, implementation, verification...

Posted Date: 21 Jan 2026

Software Engineer - Full Stack Developer 8+Yrs

services and world-class product experiences. As Lead Full Stack Engineer, lead team to deliver highly scalable services...Job Description Job Descriptions: Overview: We are looking to hire an experienced full stack engineer to work...

Posted Date: 15 Jan 2026

IP Prototyping Engineer

your career. SMTS SOFTWARE SYSTEMS DESIGN ENGINEER THE ROLE: We are seeking an FPGA-Based Design & Validation Expert... will own the design cycle from RTL development through lab bring-up and system-level integration, collaborating closely...

Posted Date: 14 Jan 2026