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Keywords: Lead RTL SOC Design , Location: Bangalore, Karnataka

Page: 2

Physical Design Lead

place and route of RTL blocks for high speed datapath and control logic applications. Experience in automated design flows..._ MTS SILICON DESIGN ENGINEER (AECG ASIC PD FCL) THE ROLE: We are looking for an adaptive, self-motivative design...

Posted Date: 31 Jul 2025

Lead design verification engineer

difficult DV problems, make room for innovation. You will be working on all aspects of IP/SOC from RTL simulation to post...Job Requirements Be part of team to build custom SOC/IP for next generation devices. The position involves solving...

Company: Quest Global
Posted Date: 15 Aug 2025

Techincal Lead- Design Verification

Job Requirements The ideal candidate for this Senior Lead Verification Engineer position... should have a strong background in verification methodologies and be able to effectively lead a team in achieving project goals. 10-12 Yrs of work...

Company: Quest Global
Posted Date: 13 Aug 2025

Physical Design Engineer

Job Details: Job Description: Performs physical design implementation of custom IP and SoC designs from RTL to GDS...+ years of experience in physical design using industry EDA tools. Lead Sub System/SOC physical design for at least 1 product...

Company: Intel
Posted Date: 19 Oct 2025

ASIC Design Manager

architecture and micro-architecture definition for complex digital blocks Oversee RTL design and conduct design reviews to ensure... in: ASIC architecture and micro-architecture RTL design (Verilog/VHDL) Synthesis and Static Timing Analysis (STA) Solid...

Company: MaxLinear
Posted Date: 06 Oct 2025

ASIC Design Manager

and micro-architecture definition for complex digital blocks Oversee RTL design and conduct design reviews to ensure high... in: ASIC architecture and micro-architecture RTL design (Verilog/VHDL) Synthesis and Static Timing Analysis (STA) Solid...

Company: MaxLinear
Posted Date: 05 Oct 2025

Delivery Manager - Physical Design

and lead big SoC design teams and have successfully drove multiple complex SOCs to tape-outs on advance tech nodes. Deep... Key Responsibilities: Delivery Leadership Lead the Define and drive end-to-end RTL-to-GDSII flows, tailored...

Company: Quest Global
Posted Date: 24 Sep 2025

General Manager - Physical Design

implementation. Build and lead big SoC design teams and have successfully drove multiple complex SOCs to tape-outs on advance tech... Lead the Define and drive end-to-end RTL-to-GDSII flows, tailored for customer-specific technology, tools, and deliverables...

Company: Quest Global
Posted Date: 24 Sep 2025

Technical Director, Physical Design

design capabilities and infrastructure in alignment with company-wide technology strategy. • Lead RTL-to-GDSII implementation... for multiple SoC programs, overseeing synthesis, floorplanning, power grid design, place and route, clock tree synthesis, timing...

Company: Marvell
Posted Date: 24 Sep 2025

Growth Analyst/Specialist - Interior Design (1-5 yrs) Bangalore/Hyderabad,Telangana,Ind (B2B/Corporate Sales)

pipeline growth for our VLSI, ASIC, SoC, and design services by identifying and qualifying potential global clients in the... generation, or sales (B2B tech preferred).- Basic understanding of semiconductor terminology (ASIC, SoC, RTL, IP...

Posted Date: 17 Sep 2025

GPIO Circuit Design Engineering Manager

. For more information, visit www.gf.com. Job Summary: The GPIO Manager will lead the design, development, and delivery of GPIO IP blocks... is also plus. Experience with RTL design (Verilog/VHDL), synthesis, and timing closure. Familiarity with ESD, pad ring design, and physical...

Posted Date: 10 Sep 2025

Design Verification Principal Engineer

, etc), develop test cases (UVM & assembly), verify and do coverage analysis in RTL and gate level design. - Conduct reviews..., above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. Your Team, Your Impact Marvell Data Centre Engineering (DCE...

Company: Marvell
Posted Date: 06 Sep 2025

Serdes PHY Analog Design Engineer

sign-off to post silicon bring up. Work closely with RTL, DD, PD, DV and SoC verification teams to integrate the PHY.... Skills & Experience For lead position, candidates must have performed PHY Lead roles which include PHY integration to SOC...

Company: Qualcomm
Posted Date: 03 Sep 2025

Design Verification Principal Engineer

level design. · Conduct reviews in all the SOC/Subsys verification phases, to achieve desired quality + on-schedule... · Must Lead a team of 4-6 engineers · Experience in SOC/Subsys level/Block verification of ARM-based SOCs; experience in ARM based...

Company: Marvell
Posted Date: 27 Aug 2025

Sr Technical Architect - Physical Design

SoC physical design projects. The ideal candidate will have extensive hands-on expertise in RTL2GDS implementation... flows, tailored for customer-specific technology, tools, and deliverables. Lead complex top-level and hierarchical SoC...

Company: Quest Global
Posted Date: 20 Aug 2025

ASIC Design Engineer

Architecture and Design of custom IPs for integration into SOC's. Design & Develop RTL for Interfaces, Power Management, Clocking... of Echo devices is looking for a Senior SoC Integration Design Engineer to continue to innovate on behalf of our customers...

Company: Amazon
Posted Date: 01 Aug 2025

Design Principal Engineer

, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. Your Team, Your Impact Marvell Data Centre Engineering (DCE... performance, architectural and design requirement reviews with cross-functional teams, IP Vendors and customers Implement...

Company: Marvell
Posted Date: 31 Jul 2025

Senior Manager, Design Verification Engineering

Design Verification team at Aeva India, you will build and lead a team of talented verification engineers to verify new.... You will work closely with cross-functional teams of Architects, RTL design and Verification, Physical Design, and System software...

Company: Aeva
Posted Date: 30 Jul 2025

Senior Technical Lead

++ solutions. (1.) Key Responsibilities 1. Lead a team of c++ developers in the design, development, and implementation of c...Designation Senior Technical Lead No. of Positions 6 Skill (Primary) Technical Skills (APPS)-Programming...

Company: HCLTech
Posted Date: 20 Sep 2025

Senior Tech Lead - DV

Job Requirements Design Verification professional with a proven track record in leading DV projects for complex SoC..., developing, and executing verification strategies for SoC/ASIC designs. Collaborate with architects, RTL designers...

Company: Quest Global
Posted Date: 18 Aug 2025