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Keywords: Lead RTL SOC Design , Location: Bangalore, Karnataka

Page: 3

Senior Staff Power Design Engineer

Supply integrity checks Low Power design & Signoff Work on complete SoC design cycle of ASICs, starting from Architecture... nodes across 3nm/5nm/7nm and more. Collaborate with cross-functional teams including RTL design, verification, and DFT...

Company: Marvell
Posted Date: 02 Sep 2025

Design Verification Principal Engineer

level design. · Conduct reviews in all the SOC/Subsys verification phases, to achieve desired quality + on-schedule... · Must Lead a team of 4-6 engineers · Experience in SOC/Subsys level/Block verification of ARM-based SOCs; experience in ARM based...

Company: Marvell
Posted Date: 28 Aug 2025

Sr Technical Architect - Physical Design

SoC physical design projects. The ideal candidate will have extensive hands-on expertise in RTL2GDS implementation... flows, tailored for customer-specific technology, tools, and deliverables. Lead complex top-level and hierarchical SoC...

Company: Quest Global
Posted Date: 20 Aug 2025

ASIC Design Engineer

Architecture and Design of custom IPs for integration into SOC's. Design & Develop RTL for Interfaces, Power Management, Clocking... of Echo devices is looking for a Senior SoC Integration Design Engineer to continue to innovate on behalf of our customers...

Company: Amazon
Posted Date: 01 Aug 2025

Design Principal Engineer

, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. Your Team, Your Impact Marvell Data Centre Engineering (DCE... performance, architectural and design requirement reviews with cross-functional teams, IP Vendors and customers Implement...

Company: Marvell
Posted Date: 31 Jul 2025

Senior Manager, Design Verification Engineering

Design Verification team at Aeva India, you will build and lead a team of talented verification engineers to verify new.... You will work closely with cross-functional teams of Architects, RTL design and Verification, Physical Design, and System software...

Company: Aeva
Posted Date: 30 Jul 2025

DFT Lead- Bangalore- 10+ years’ experience

on various aspects of IP and SoC DFT including the DFT Architecture, Spyglass DFT, RTL implementation, Verification, Scan...We are looking for an energetic, passionate and process oriented DFT Lead who has extensive experience in planning...

Company: Angel & Genie
Posted Date: 02 Oct 2025

Lead DFT Engineer

We are seeking an experienced Lead DFT Engineer to drive the integration and optimization of Design-for-Test (DFT) architecture.... Own DFT planning, insertion, verification, and validation processes. Collaborate with RTL Design, Physical Design...

Posted Date: 30 Sep 2025

Senior Technical Lead

++ solutions. (1.) Key Responsibilities 1. Lead a team of c++ developers in the design, development, and implementation of c...Designation Senior Technical Lead No. of Positions 6 Skill (Primary) Technical Skills (APPS)-Programming...

Company: HCLTech
Posted Date: 21 Sep 2025

Lead Static Timing Analysis Engineer

/SoC designs. In this role, you will lead timing sign-off activities, coordinate with cross-functional teams, and ensure... industry-standard STA tools. Analyze timing reports and debug violations, providing guidance to physical design, RTL, and DFT...

Posted Date: 28 Aug 2025

Senior Tech Lead - DV

Job Requirements Design Verification professional with a proven track record in leading DV projects for complex SoC..., developing, and executing verification strategies for SoC/ASIC designs. Collaborate with architects, RTL designers...

Company: Quest Global
Posted Date: 18 Aug 2025

Embedded Lead - Satellite Payload

management. Lead a team of FPGA and embedded software developers to develop RTL/Firmware design requirements, architecture... is looking for a passionate Lead- Payload Electronics to design and develop satellite payload electronics. The engineer will be responsible...

Company: Digantara
Posted Date: 13 Aug 2025

Chip Top lead

Job Requirements Role Overview We are looking for an experienced Physical Design Chip Lead to lead the end-to-end...-functional teams, ensuring design closure, and meeting PPA (Power, Performance, Area) goals. Key Responsibilities Lead...

Company: Quest Global
Posted Date: 06 Aug 2025

Technical Lead - DV

and drive SOC Design Verification for an ARM based SoC Design. Extensive experience in SV/UVM based SOC or IP Verification...Job Requirements Job Summary: We are looking for a highly skilled and hands on Senior Lead Engineer to lead...

Company: Quest Global
Posted Date: 19 Jul 2025

Senior Technical Lead

++ solutions. (1.) Key Responsibilities 1. Lead a team of c++ developers in the design, development, and implementation of c...Designation Senior Technical Lead No. of Positions 13 Skill (Primary) Technical Skills (APPS)-Programming...

Company: HCLTech
Posted Date: 16 Jul 2025

Urgently Hiring 10 + Years of DFT Lead Engineers_Exposure on SCAN insertion, ATPG and pattern simulation/debug._Bangalore Location_CTC 80 LPA+

has extensive experience in planning, implementation and verification of DFT features for multiple SoC. Direct Responsibilities... of the role, but not limited to,  working on various aspects of IP and SoC DFT including the DFT Architecture, Spyglass...

Company: Angel & Genie
Posted Date: 27 Sep 2025

GLS Lead

: Bangalore, Karnataka, India Team: SoC Design Verification / Silicon Sign-off Position Summary We are seeking a highly... cells, level shifters, and power-gating sequences. Collaborate closely with RTL design, Physical Design (PD), and DFT teams...

Company: Quest Global
Posted Date: 17 Sep 2025

IP Verification Lead

Exposure to RTL design, software development, formal verification, or other related domains ACADEMIC CREDENTIALS: Bachelor..._ MTS SILICON DESIGN ENGINEER THE ROLE: The Infinity Fabric transport layer verification team...

Posted Date: 19 Aug 2025

IP Verification Lead

Exposure to RTL design, software development, formal verification, or other related domains ACADEMIC CREDENTIALS: Bachelor..._ MTS SILICON DESIGN ENGINEER THE ROLE: The Infinity Fabric transport layer verification team...

Posted Date: 14 Aug 2025

Technical Lead I - VLSI

Backend or Analog design with minimal supervision Outcomes: * Work as an individual contributor owning any one task of RTL... needed to execute the project Knowledge Examples: Knowledge of project(s) in any of the design by executing – RTL Design...

Company: UST
Posted Date: 14 Aug 2025