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Keywords: Low-power SoC DV Engineer, Location: Bangalore, Karnataka

Page: 1

Design Verification Principal Engineer - SOC

. The SoC family of multi-core CPU processors and Radio Access SoCs offer best-in-class performance, low power, rich... product space Work with multiple stakeholders across geographies for SoC DV ownership for - TB architecture definition...

Company: Marvell
Posted Date: 29 Jan 2026

GPU Power Aware Design Verification Engineer (2–8 Years)

. As a Power Aware Design Verification (DV) Engineer, you will own low-power verification of advanced GPU IP blocks and subsystems... will be a plus Good understanding of low power design techniques Proficient with low power SoC design constructs such as clock gates...

Company: Qualcomm
Posted Date: 10 Dec 2025

DV SV UVM_DRAM

and detail-oriented Design Verification Engineer to join our core team. As a DV Engineer, you will play a crucial role...-related issues. Knowledge of low-power verification techniques (UPF). Prior experience contributing to post-silicon...

Company: Quest Global
Posted Date: 16 Dec 2025

Senior Design Verification Engineer, SSG

based low power verification Contribute to verification activities across simulation and emulation platforms Work... experience including owning end to end DV of major SOC blocks - Experience with RTL development environments - Proficiency...

Company: Amazon
Posted Date: 04 Feb 2026

Lead Design Verification Engineer

background in IP DV with significant, demonstrated experience in subsystem and SoC-level verification. Proven deep expertise... methodologies including UVM, ABV, and co-simulation; proficiency in low-power verification techniques, HDL/verification languages...

Company: Intel
Posted Date: 08 Jan 2026

Lead Design Verification Engineer

background in IP DV with significant, demonstrated experience in subsystem and SoC-level verification Proven deep expertise... Strong background in simulation-based verification methodologies including UVM, ABV, and co-simulation; proficiency in low-power...

Company: Intel
Posted Date: 28 Dec 2025

Serdes PHY Analog Design Engineer

- finfets & beyond. Design goals include low-power analog designs to address Qualcomm's low-power wireless products... sign-off to post silicon bring up. Work closely with RTL, DD, PD, DV and SoC verification teams to integrate the PHY...

Company: Qualcomm
Posted Date: 22 Nov 2025

CPU Design Sr Lead Verification Engineer

General Summary: Qualcomm is hiring strong DV engineers to verify high performance and low power CPUs in Bangalore.... Please forward your profiles if you meet the requirement. Roles and Responsibilities o Responsible for power management...

Company: Qualcomm
Posted Date: 31 Jan 2026

CPU Design Sr Staff Verification Engineer

General Summary: Qualcomm is hiring strong DV engineers to verify high performance and low power CPUs in Bangalore.... Please forward your profiles if you meet the requirement. Roles and Responsibilities o Responsible for power management...

Company: Qualcomm
Posted Date: 25 Dec 2025

CPU Design Staff Verification Engineer

General Summary: Qualcomm is hiring strong DV engineers to verify high performance and low power CPUs in Bangalore.... Please forward your profiles if you meet the requirement. Roles and Responsibilities o Responsible for power management...

Company: Qualcomm
Posted Date: 18 Dec 2025