Own specifications, implementation, and integration of key blocks such as PLLs, DLLs, CDRs, receivers, transmitters, or high-speed datapaths. Drive and supervise complex analog layout activities, including IP floorplanning and coordination ...
Design and develop RTL for next-generation DRAM memory controllers and subsystem blocks. Collaborate with full-custom analog design teams and integrate third-party IP and internal SystemVerilog blocks into cohesive digital solutions. Partne...