Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical.... Job description: Role requirement is for CAD engineer with 3-4 years work experience in the Signoff CAD Team at Qualcomm BDC. The team...
Job Requirements At Quest Global, it’s not just what we do but how and why we do it that makes us different. With over 25 years as an engineering services provider, we believe in the power of doing things differently to make the impossibl...
and Synthesis Methodology Engineer to join our ASIC-PD Methodology team in our Bengaluru Design Centre. This team is responsible... and see how you can make a lasting impact on the world! NVIDIA is looking for an expert and skilled Senior Formal Equivalence Checking...
Job Title: Project Lead/Team Lead/ Senior Simulation Engineer Qualification: 1. B.E / B. Tech or M.E/ M. Tech (Mech... of 7 to 15 years in a BiW related organisation with expertise in Robotic Simulation Engineer. Software Skills...
Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical...+ year of Hardware Engineering or related work experience. QCT Strategic PD team is actively seeking candidates skilled...
team part of The Central Engineering PD group at Marvell, Bangalore. This team is part of global Implementation team... industry standard tools. What You Can Expect As a STA engineer you will be part of our signoff team responsible for signing...
Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical... on automation scripts within STA/PD tools for methodology development. Good Technical writing and Communication skills...
Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical... gating. Should be able to work independently with design, DFT and PD team for netlist delivery, timing constraints...
Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical... design from product-based companies. DDRPhy /PCIE-high speed interface PD or 3DIC Expertise Timing Signoff experience...
steering Operational configuration management Functional electrics (PD, WD, FD creation and modification) Creation...
steering Operational configuration management Functional electrics (PD, WD, FD creation and modification) Creation...
be doing: In this position, you will expected to lead all block/chip level PD activities. PD activities includes floor...
your career. Roles & Responsibilities for Lead System Engineer: * Assume technical responsibility from Pre-silicon to Post... Speed I/Os like PCIe (preferably Gen4 and above), Memory (DDR4/DDR5.LPDDR4/LPDDR5), USB4.0/3.2/3.1, USB PD, USB Type C...
your career. SMTS SILICON DESIGN ENGINEER Drive and lead execution with SOC teams for Design. Drive efficiency on execution... checks. Drive quality and timely delivery to various teams like DV, DFT, Emulation & PD. Work with the architecture team...
_ SENIOR SILICON DESIGN ENGINEER THE ROLE (SOC Verification Engineer: GDP DV ): Work on SOC level verification activities... for verifying and integration. Add on responsibility SOC Integration after having co-ordination with IPs, SOC (Design, DFT & PD...
delivery to various teams like DV, DFT, Emulation & PD. Work with architecture team on high level arch and uArch definition... with SOC (Design, DFT, DV, PD), System and SW team to deliver next generation high performance SOC designs. Work with post...
delivery leveraging SAFe. This role is a senior program management role that would act as the Release Train Engineer (RTE... (VAS) PD within Visa. VAS-RaIS has a suite of high visibility, high-volume, revenue earning applications that provide solutions...
delivery leveraging SAFe. This role is a senior program management role that would act as the Release Train Engineer (RTE... (VAS) PD within Visa. VAS-RaIS has a suite of high visibility, high-volume, revenue earning applications that provide solutions...
Job Requirements Job Description Job Title: Senior Gate-Level Simulation (GLS) Verification Engineer Location... skilled and meticulous Gate-Level Simulation (GLS) Verification Engineer to serve as the last line of defense before silicon...
your career. SMTS SILICON DESIGN ENGINEER THE ROLE: The focus of this role will involve driving the physical design flow..., and area (PPA) targets on SerDes PHY IPs. THE PERSON: As a senior member of the SerDes IP Physical Design team...