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Keywords: Power Convergence Lead Physical Design, Location: Bangalore, Karnataka

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Power Convergence Lead Physical Design

_ Responsibilities Physical Design (Low Power) Technologist THE ROLE: As a member of the Strategic Silicon Solution Group Full Chip... Design, Timing Analysis, Synthesis, Logical equivalence, Physical Verification, Power design/implementation/signoff...

Posted Date: 17 Nov 2025

Lead MTS Physical Design

to provide inputs from physical design and STA. Work closely with DFT team on scan aspects and provide inputs from physical... an exceptional Lead Static Timing Analysis Engineer to join our STA team in Bangalore. In this role, you will be working...

Company: Rambus
Posted Date: 30 Oct 2025

Senior Technical Lead - Physical Design

’s competency & capability. Technical Mentorship Mentor physical design teams on advanced technology node implementation..., complex SoC partitioning, and tool optimizations, Low power, STA, EMIR, PV convergence. Review block-level signoff issues...

Company: Quest Global
Posted Date: 24 Sep 2025

GPU / CPU physical design Lead

feasibility studies on performance, power, and area (PPA) tradeoffs for design closure. Develop and improve physical design..._ SMTS SILICON DESIGN ENGINEER THE ROLE: The position will involve working with a very experienced CPU physical design...

Posted Date: 02 Oct 2025

Principal Engineer, Physical Design

opportunity to work on both the physical design and methodology for future designs of our next-generation, high-performance... to ensure design convergence and integration in a timely manner. Implement/support designs with multi-voltage designs through...

Company: Marvell
Posted Date: 01 Nov 2025

Senior Staff Engineer, Physical Design

opportunity to work on both the physical design and methodology for future designs of our next-generation, high-performance... physical design of complex chips as well as the methodology to enable an efficient and robust design process. This position...

Company: Marvell
Posted Date: 14 Oct 2025

Delivery Manager - Physical Design

physical design teams on advanced technology node implementation, complex SoC partitioning, and tool optimizations, Low power.... low power implementation (UPF), hierarchical signoff closure, and flow correlation across synthesis, STA, and physical...

Company: Quest Global
Posted Date: 24 Sep 2025

General Manager - Physical Design

’s competency & capability. Technical Mentorship Mentor physical design teams on advanced technology node implementation..., complex SoC partitioning, and tool optimizations, Low power, STA, EMIR, PV convergence. Review block-level signoff issues...

Company: Quest Global
Posted Date: 24 Sep 2025

Lead IP / RTL Design integration Engineer

, Timing analysis, Floorplan convergence, Physical design implementation and signoff. Experience in ASIC execution, customer... your career. Drive and lead execution with SOC teams for Design. Drive efficiency on execution of SOC for integration as well...

Posted Date: 10 Sep 2025

Lead IP / RTL SOC Design Engineer

, Design Partitioning, PPA optimization, PnR, Timing analysis, Floorplan convergence, Physical design implementation... your career. SMTS SILICON DESIGN ENGINEER Drive and lead execution with SOC teams for Design. Drive efficiency on execution...

Posted Date: 09 Sep 2025

NoC (RTL) Design - PE/Director

design lead and is part of BDC infrastructure (NoC/Interconnect) core team Responsible for specification, design... and implementation of interconnect and related IP's Actively work with SoC team, verification team, physical design team, SoC Floorplan...

Company: Qualcomm
Posted Date: 25 Nov 2025

STA Synthesis Lead

scenarios. This role requires deep technical expertise in physical design tools and methodologies and the ability to lead... and mentor physical design engineers. KEY RESPONSIBILITIES: Lead and develop timing methodologies, establish SDC constraints...

Posted Date: 01 Nov 2025

Lead Full Chip timing, STA Expertise

_ PMTS SILICON DESIGN ENGINEER THE ROLE: The position will involve working with a very experienced physical design team... with Design teams to understand the design and convergence challenges and providing ECOs with a focus on PPA and TAT optimizations...

Posted Date: 20 Sep 2025

Technologist, ASIC Development Engineering

, Power Planning, Placement & Optimization, CTS, Routing, Design Convergence, and Sign-off with in-depth expertise... in and that we have the power to shape. Sandisk meets people and businesses at the intersection of their aspirations and the moment...

Company: SanDisk
Posted Date: 25 Nov 2025