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Keywords: Pre and Post Silicon Validation Engineer, Location: Bangalore, Karnataka

Page: 5

Lead MTS Logic Design

specifications. Post silicon validation support in bringing up parts. Qualifications Minimum 8+ years of solid ASIC logic... test coverage. Does pre implementation design checks like lint, CDC, RDC, constraint validation. Works with physical...

Company: Rambus
Posted Date: 12 Feb 2026

SPE Logic Design

coverage. Does pre implementation design checks like lint, CDC, RDC, constraint validation. Works with physical design team... silicon validation support in bringing up parts Qualifications Minimum 15 years of solid ASIC logic/Digital design...

Company: Rambus
Posted Date: 12 Feb 2026

Lead MTS Logic Design

specifications. Post silicon validation support in bringing up parts. Qualifications: Minimum 8+ years of solid ASIC logic... test coverage. Does pre implementation design checks like lint, CDC, RDC, constraint validation. Works with physical...

Company: Rambus
Posted Date: 07 Feb 2026

RAS Lead

post silicon enablement and validation to take the right technical decisions for the team Individual requirements: 13... your career. SMTS SILICON DESIGN ENGINEER Roles & Responsibilities for RAS Lead: Define and develop the RAS charter for the...

Posted Date: 19 Jan 2026

Lead MTS Analog Engineering

coverage. Does pre implementation design checks like lint, CDC, RDC, constraint validation. Works with physical design team... silicon validation support in bringing up parts. Qualifications: Minimum 10 years of solid ASIC logic/Digital design...

Company: Rambus
Posted Date: 10 Jan 2026

SPE Logic Design

coverage. Does pre implementation design checks like lint, CDC, RDC, constraint validation. Works with physical design team... silicon validation support in bringing up parts Qualifications: Minimum 15 years of solid ASIC logic/Digital design...

Company: Rambus
Posted Date: 14 Dec 2025

NoC (RTL) Design - PE/Director

Interconnect meeting all performance requirement, and with silicon validation team to co-relate pre-silicon and post silicon design... General Summary: Design Engineer (18+ years of experience) SoC Interconnect for the next generation System-on-chip (SoC...

Company: Qualcomm
Posted Date: 25 Nov 2025

High Speed Memory/IO Circuit Lead (Mixed Signal)

/validation test plans. Supervise pre-silicon layout, post-silicon characterization and debug. Support product bring-up... blocks circuit and architecture technical specifications, AMS pre-silicon verification, AMS post-silicon characterization...

Posted Date: 19 Nov 2025