. We would love the opportunity to work with YOU! Requirements 1) Job Title: RISC-V Processor Engineer Skills...: Strong experience in processor architecture and microarchitecture design. Proficiency in RTL design using Verilog/SystemVerilog...
like PCIE/DDR/USB/Other, Good understanding of AXI/AHB/APB Bus protocol Prior knowledge of ARM/RISC Processor based designs..._ SMTS SILICON DESIGN ENGINEER (AECG ASIC - SoC Design Verification Lead) THE ROLE: The focus of this role is to plan...
understanding of AXI/AHB/APB Bus protocol Prior knowledge of ARM/RISC Processor based designs verification and bring-up..._ SILICON DESIGN ENGINEER 2 (AECG ASIC - SoC verification Engineer) THE ROLE: The focus of this role is to plan, build...
_ SENIOR FIRMWARE ENGINEER THE ROLE: We are looking for a Senior Engineer with an obsession for firmware. As part of the... role, this engineer will work closely with other firmware engineers, developers and architects across various IPs...
/APB Bus protocol Prior knowledge of ARM/RISC Processor based designs verification and bring-up verification Developing..._ SENIOR SILICON DESIGN ENGINEER (AECG ASIC - SoC Design Verification) THE ROLE: The focus of this role is to plan, build...
Engineering General Summary: Qualcomm's software CPU (aka application processor) architecture group develops long-term... CPU architecture ... especially ARMv8 architecture (RISC-V architecture expertise is a plus) c) Knowledge of various...
understanding of embedded SW development, Linux and basic knowledge of ARM/RISC micro-processor or SOC architecture. Working...
Power/ Performance/ Area tradeoffs Develop strong understanding of heterogenous processor cores & subsystems (A55/ M55/ M4.../ U55/ RISC-V/ DSP core, and associated infrastructure such as caches, interconnect fabric, GIC, DMA, MMU, Coresight Debug...
Power/ Performance/ Area tradeoffs Develop strong understanding of heterogenous processor cores & subsystems (A55/ M55/ M4.../ U55/ RISC-V/ DSP core, and associated infrastructure such as caches, interconnect fabric, GIC, DMA, MMU, Coresight Debug...
like PCIE/DDR/USB/Other, Good understanding of AXI/AHB/APB Bus protocol Prior knowledge of ARM/RISC Processor based designs..._ MTS SILICON DESIGN ENGINEER (AECG ASIC - SoC Design Verification Lead) THE ROLE: The focus of this role is to plan...
/APB Bus protocol Prior knowledge of ARM/RISC Processor based designs verification and bring-up verification Developing..._ SENIOR SILICON DESIGN ENGINEER (AECG ASIC - SoC Design Verification) THE ROLE: The focus of this role is to plan, build...
like PCIE/DDR/USB/Other, Good understanding of AXI/AHB/APB Bus protocol Prior knowledge of ARM/RISC Processor based designs..._ MTS SILICON DESIGN ENGINEER (AECG ASIC - SoC Design Verification Lead) THE ROLE: The focus of this role is to plan...