Find your dream job NOW!

Click on Location links to filter by Job Title & Location.
Click on Company links to filter by Company & Location.
For exact match, enclose search terms in "double quotes".

Keywords: RTL, Location: California

Page: 7

Design Verification Engineer (GPU)

to optimize isolation time and produce meaningful failing signatures Analyze failing tests to root cause along, working with RTL...

Company: Protingent
Location: San Jose, CA
Posted Date: 14 Jan 2026

FPGA Engineer III

& Implement: Develop and optimize RTL/synthesizable FPGA/SoC logic for mission-critical applications. Verify: Create HDL... and industry standards to evolve design approaches. YOU’RE AWESOME AT: FPGA Development: Skilled in VHDL/Verilog coding, RTL...

Company: Innoflight LLC
Location: San Diego, CA
Posted Date: 14 Jan 2026
Salary: $130000 - 160000 per year

Senior Silicon Design Engineer

tools for RTL coding, circuit simulation, timing closure, parasitic extraction, and physical verification. Experience...

Posted Date: 14 Jan 2026

Sr. Design Verification Engineer

solutions, Offshore Design Centers (ODCs), and staff augmentation across key areas like RTL Design, UVM Verification, Emulation..., FPGA Validation, DFT, RTL-to-GDSII, Physical Design, Mask Layout, and Silicon Bring-up. Our embedded services include...

Company: Prodapt
Location: San Jose, CA
Posted Date: 14 Jan 2026

Senior Staff Emulation Engineer - ZEBU

solutions, Offshore Design Centers (ODCs), and staff augmentation across key areas like RTL Design, UVM Verification, Emulation..., FPGA Validation, DFT, RTL-to-GDSII, Physical Design, Mask Layout, and Silicon Bring-up. Our embedded services include...

Company: Prodapt
Location: San Jose, CA
Posted Date: 14 Jan 2026

Analog/Mixed Signal Verilog Modeling Design Engineer

and amplification, etc. Understand good coding of RTL of digital design (eg clock divider, decoder, FSM, etc) and testbench creation...

Company: Broadcom
Location: Irvine, CA
Posted Date: 14 Jan 2026
Salary: $120000 - 192000 per year

Senior Staff Emulation Engineer - ZEBU

services. We offer turnkey solutions, Offshore Design Centers (ODCs), and staff augmentation across key areas like RTL Design..., UVM Verification, Emulation, FPGA Validation, DFT, RTL-to-GDSII, Physical Design, Mask Layout, and Silicon Bring-up...

Company: Prodapt
Location: San Jose, CA
Posted Date: 13 Jan 2026

Sr. Design Verification Engineer

services. We offer turnkey solutions, Offshore Design Centers (ODCs), and staff augmentation across key areas like RTL Design..., UVM Verification, Emulation, FPGA Validation, DFT, RTL-to-GDSII, Physical Design, Mask Layout, and Silicon Bring-up...

Company: Prodapt
Location: San Jose, CA
Posted Date: 13 Jan 2026

Core Engineering - Design Engineer V

profiling experience at IP/SoC level Day-to-Day Responsibilities Perform PPA optimization with Fusion compiler Conduct RTL... at RTL and UPF Document and communicate clearly Company Benefits & Culture Inclusive and diverse work environment...

Posted Date: 11 Jan 2026

Design Engineer

. Responsibilities: Perform PPA optimization with Fusion compiler. Perform RTL and netlist level Power analysis Perform post... and analyze reports of ASIC flows (Synthesis, PD, Power, Timing) Implement some blocks at RTL and UPF Ability to document...

Company: Aditi Consulting
Location: Sunnyvale, CA
Posted Date: 11 Jan 2026

Senior Formal Verification Technical Expert

-class products. In this role you will be engaged with architects, micro architecture, RTL, CAD/Methodology, and internal...

Posted Date: 10 Jan 2026

Senior Staff GPU Validation and Emulation Engineer

. Job Description: Synthesize the Verilog RTL and create models and compile them to emulators like Veloce/Palladium/Zebu and/or FPGA platforms... of the synthesized FPGA RTL. Work on third-party IP integration and system-level debugging. System level RTL simulation...

Company: Qualcomm
Location: San Diego, CA
Posted Date: 10 Jan 2026

Senior Manager of SoC Virtual Platform Modeling, Annapurna Labs Machine Learning Accelerators, AWS

dive into technical issues and the codebase head-first - Work closely with architecture, RTL design, design verification...

Company: Amazon
Location: Cupertino, CA
Posted Date: 10 Jan 2026

Senior Verification Engineer

hardware design for embedded systems Experience with hardware emulation or FPGAs RTL design for FPGA or emulation experience...

Company: Microsoft
Location: Mountain View, CA
Posted Date: 10 Jan 2026

Testbench/Verification Engineer - Santa Clara, CA, or Boxborough, MA, or Austin, TX

debug - Scripting language (Perl, Python, Ruby - Proven experience in debugging the test-bench, VIP, RTL code NICE... frameworks and testbenches, processes and flows. Proficient in debugging testbench and RTL code using simulation tools...

Company: Sunrise Systems
Location: Santa Clara, CA
Posted Date: 10 Jan 2026

Design Verification Engineer (GPU)

to optimize isolation time and produce meaningful failing signatures Analyze failing tests to root cause along, working with RTL...

Company: Protingent
Location: San Jose, CA
Posted Date: 09 Jan 2026

Principal CAD Engineer

communication skills Ability to run the following tasks is a plus: RTL to gates, and gates-to-gates equivalence checking Chip...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 09 Jan 2026
Salary: $146850 - 220000 per year

GPU Design Verification Engineer- Power

methodology to improve the verification flows. System level RTL simulation & design verification. Support SoC DV... verification components/UVCs, testbench for RTL verification 5+ years of hands on testbench bringup, integrating third party VIPs...

Company: Qualcomm
Location: San Diego, CA
Posted Date: 09 Jan 2026

Senior ASIC Physical Design Engineer, Netlisting

. Expertise in logic equivalence checking/FV required from RTL to tapeout with industry-standard tools. Deep understanding... of hardware architecture and hands-on skills in RTL/logic design for timing closure. Experience in clock-domain-crossing...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 09 Jan 2026

Silicon Technical Lead

, including RTL, Physical Design (PD), Design Verification (DV), and post-silicon bringup. Define and drive the end-to-end... (e.g., RTL, PD, DV) and strong familiarity with the entire ASIC flow. Experience with managing silicon vendors...

Company: DeepMind
Location: Mountain View, CA
Posted Date: 09 Jan 2026