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Keywords: RTL / Design Verification Engineer, Location: Santa Clara, CA

Page: 4

Senior C++ Software Engineer - Chip Design Tools

and support of infrastructure tools used by design engineers for build and verification of architectural, rtl, and gate level... designs. As a software engineer, you will craft highly efficient software to automate and facilitate chip design...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 10 Dec 2025

Principal Mixed Signal Design Engineer

, or Mentor Graphics. Very good understanding of related areas such as RTL, Firmware, Design Verification, Design for Test... electronic design automation (EDA) tools for schematic capture, simulation, layout, and verification, such as Cadence, Synopsys...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 06 Dec 2025
Salary: $165630 - 248100 per year

Staff, Physical Design Engineer

Bachelor's degree in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation... of ASIC design, verification, validation, integration, or related work experience. Master's degree in Electrical/Electronic...

Company: Qualcomm
Location: Santa Clara, CA
Posted Date: 02 Mar 2026

Design Engineer - Sensors

usage of simulation tools. Experience with ASIC ECO flow, RTL sanity tools specific to Design Rule Checking and Clock Domain... and a good team player Bachelor's degree in Science, Engineering, or related field and 4+ years of ASIC design, verification...

Company: Qualcomm
Location: Santa Clara, CA
Posted Date: 02 Mar 2026

Senior Principal Engineer, Physical Design

experience in back-end physical design and verification, including significant leadership roles Proven track record of leading... understanding of current design technologies used in major foundries Strong understanding of ASIC design flow, RTL integration...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 13 Dec 2025

Senior ASIC Design Engineer

design flow including RTL design, verification, logic synthesis, prototyping, DFT, timing analysis, floor-planning, ECO...NVIDIA is seeking best-in-class ASIC Design Engineers to design and implement the world’s leading SoC's and GPU...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 10 Dec 2025

Senior Staff Engineer, Physical Design

verification) using industry standard EDA tools Work with RTL design teams to drive assembly and design closure. Provide... across various disciplines such as Digital/RTL/Analog to ensure design convergence and integration in a timely manner Implement...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 06 Dec 2025
Salary: $124420 - 186400 per year

Senior Engineer, Physical Design

opportunity to work on both the physical design and methodology for future designs of our next-generation, high-performance.... What You Can Expect You will work with a global team on both the physical design of complex chips as well as the methodology...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 06 Dec 2025
Salary: $89360 - 133900 per year

GPU HW/SW Design Architect

solutions. As HW/SW co-design engineer, you will collaborate with a strong architecture, software, and design teams... (Python, etc.) Experience in hardware modeling and design using RTL or SystemC ACADEMIC CREDENTIALS: Undergrad degree...

Posted Date: 19 Feb 2026

Principal Silicon Engineer - Networking

with the software team to co-develop programmable design implementation, verification, and modeling strategies. This position.... BS and/or MS in Electrical Engineering or equivalent degree 15+ years of Design verification and/or architecture...

Company: Microsoft
Location: Santa Clara, CA
Posted Date: 01 Mar 2026

Emulation and Prototyping Engineer

Duration: 12+ Months Must have skills: FPGA Design Experience RTL Design using Verilog/System Verilog Exposure... following key responsibilities: Hardware emulation model creation. Importing design RTL. Provide RTL patches to address non...

Location: Santa Clara, CA
Posted Date: 28 Feb 2026

Engineer 3 - Electrical Engineering

for advanced robotic and medical systems. The engineer will own RTL design from architecture through validation, working hands.... We are in search of a highly motivated candidate to join our talented Team. Job Title: Engineer 3 - Electrical Engineering. Location...

Company: Ampcus
Location: Santa Clara, CA
Posted Date: 26 Feb 2026

FPGA Engineer

robotic and medical systems. The engineer will own RTL design from architecture through validation, working hands...Job Title: Electrical Engineer Location: Santa Clara CA 95054 Duration: 03/16/2026 to 08/28/2026 Shift: ["Monday...

Company: LanceSoft
Location: Santa Clara, CA
Posted Date: 25 Feb 2026

Engineer 3 - Electrical Engineering

engineer will own RTL design from architecture through validation, working hands-on across the full FPGA development lifecycle...Title: Electrical Engineer 3 Location: Santa Clara, CA Duration: 5+ Months Pay Range: $54–60/hr...

Posted Date: 25 Feb 2026

FPGA Engineer

robotic and medical systems. The engineer will own RTL design from architecture through validation, working hands...Job Title: Electrical Engineer Location: Santa Clara CA 95054 Duration: 03/16/2026 to 08/28/2026 Shift: ["Monday...

Company: LanceSoft
Location: Santa Clara, CA
Posted Date: 24 Feb 2026

Staff DFT Engineer

from RTL/netlist through post-silicon debug. In this role, you will partner closely with RTL, Physical Design, and ATE teams... violations at both block and top levels Run, analyze, and debug SpyGlass DFT/RTL checks, working with design teams to close...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 24 Feb 2026
Salary: $128000 - 189370 per year

Senior DFX Methodology Engineer

. In addition, you will help architect, develop and deploy DFT methodologies for our next generation products including RTL design..., Verification, pattern generation, partnering with teams like timing, physical design, software, bringup, production...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 14 Feb 2026

Senior Staff Engineer, Static Timing Analysis (STA) Engineer

verification) using industry standard EDA tools Work with RTL design teams to drive assembly and design closure Provide... Physical Design team at Marvell in Santa Clara is seeking a Senior Staff Engineer, Static Timing Analysis (STA) Engineer...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 13 Feb 2026
Salary: $131010 - 196300 per year

FPGA Prototyping Engineer

/HAPS platforms across AMD’s next-generation silicon programs. You will collaborate closely with architecture, RTL design...: You have a passion for modern, complex processor architecture, digital design, and verification in general. You are a team player who...

Posted Date: 04 Feb 2026

Formal Equivalence Checking Methodology Engineer

, and optimizing RTL verification methodologies - Logical Equivalence and RTL Lint, for our ground breaking VLSI designs. This role... is crucial in ensuring the functional equivalence of our designs throughout the design cycle, from RTL to GDSII! What you’ll...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 29 Jan 2026