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Keywords: RTL Design Engineer, Location: San Jose, CA

Page: 2

Physical Design Engineer (Einfochips Inc)

Position: Physical Design Engineer (Einfochips Inc) Job Description: What candidate will Be Doing: Netlist... at advanced technology nodes ( 5nm and 3nm). What we are looking for: 10+ years of experience in Physical Design (RTL-to-GDSII...

Location: San Jose, CA
Posted Date: 11 Sep 2025
Salary: $160000 - 180000 per year

Senior FPGA Design Engineer

. You should have prior knowledge about RTL design, FPGA prototyping and computer architecture. As the Senior FPGA Design Engineer for Axiado... you to apply for this job. Job Description Senior FPGA Design Engineer position is your opportunity to join one of the industry’s leading companies in platform security...

Company: Axiado
Location: San Jose, CA
Posted Date: 10 Sep 2025

Senior SoC Design Engineer

to talk to you. What you’ll do: As a Senior SoC Design Engineer, you will be responsible for building and verifying the... between components Develop and maintain top-level RTL integration structure, including clock and reset, DFT, power management and system...

Company: Persimmons
Location: San Jose, CA
Posted Date: 29 Aug 2025

Digital Design Engineer

of What's Possible™. Learn more at and on and . Digital Design Engineer About the Role As a Digital Design Engineer, you will design... and project execution skills. Key Responsibilities Perform independent RTL design and verification of digital modules Execute...

Company: Analog Devices
Location: San Jose, CA
Posted Date: 28 Aug 2025
Salary: $99360 - 136620 per year

Senior Engineer Digital IC Design

As a Senior Engineer Digital IC Design, you will be responsible for developing digital architectures that meet the..., apply today! Job Description In your new role you will: Design and implement digital circuits for automotive electronic applications Write and optimize low...

Company: Infineon
Location: San Jose, CA
Posted Date: 16 Aug 2025

Functional Verification Engineer - Applying LLMs for Chip Design

in Electrical Engineering, Computer Engineering, or related field. Proven expertise in digital design (RTL/FPGA/ASIC...About Us Chips are at the center of today's tech-driven world. But how we design them has not changed in decades...

Company: ChipStack
Location: San Jose, CA
Posted Date: 12 Aug 2025

System IP Design Verification Engineer

solutions, Offshore Design Centers (ODCs), and staff augmentation across key areas like RTL Design, UVM Verification, Emulation..., FPGA Validation, DFT, RTL-to-GDSII, Physical Design, Mask Layout, and Silicon Bring-up. Our embedded services include...

Company: Prodapt
Location: San Jose, CA
Posted Date: 24 Sep 2025

System IP Design Verification Engineer

services. We offer turnkey solutions, Offshore Design Centers (ODCs), and staff augmentation across key areas like RTL Design..., UVM Verification, Emulation, FPGA Validation, DFT, RTL-to-GDSII, Physical Design, Mask Layout, and Silicon Bring-up...

Company: Prodapt
Location: San Jose, CA
Posted Date: 23 Sep 2025

Graduate - Senior Engineer Digital IC Design

you will: Design and implement digital circuits for automotive electronic application Develop digital architectures that meet... (RTL) code, implement and simulate digital designs to ensure functionality and performance requirements...

Company: Infineon
Location: San Jose, CA
Posted Date: 20 Aug 2025

Digital Design Engineer - New College Grad

protocol Expertise/ understanding in digital designs RTL Exp Hands on experience with complete ASIC flow is required Good...

Company: Rambus
Location: San Jose, CA
Posted Date: 11 Sep 2025
Salary: $72200 - 134200 per year

GPU Formal Design Verification

Job Title: GPU Formal Design Verification Position Description: Protingent Staffing has an exciting contract GPU... Formal Design Verification opportunity with our client located in San Jose, CA. Job Description: As a Formal Design...

Company: Protingent
Location: San Jose, CA
Posted Date: 27 Sep 2025
Salary: $50 - 60 per hour

GPU Formal Design Verification

Job Title: GPU Formal Design Verification Position Description: Protingent Staffing has an exciting contract GPU... Formal Design Verification opportunity with our client located in San Jose, CA. Job Description: As a Formal Design...

Company: Protingent
Location: San Jose, CA
Posted Date: 25 Sep 2025
Salary: $50 - 60 per hour

SDC Engineer (eInfochips Inc)

with physical design and DFT teams to close fullchip timing in multiple timing modes. Option to also do block level RTL design... of SDCs as early as possible in design cycle. Reviewing block level SDCs and clocking diagrams and mentor other RTL design...

Location: San Jose, CA
Posted Date: 02 Oct 2025

Senior Power Management Engineer

Senior Power Management Engineer US Citizen or US Permanent Resident San Jose, California or remote... from any US location Responsibilities: Conduct power modeling & analysis: use UPF driven flows for early RTL power budgeting, leakage...

Location: San Jose, CA
Posted Date: 02 Oct 2025

Silicon Architect Lead / Principal Engineer

communication and presentation skills Hands-on experience with front end RTL, architecture, modeling, NOC/Fabric/AXI design, power...Silicon Architect Lead / Principal Engineer US Citizen or US Permanent Resident San Jose, California or remote...

Location: San Jose, CA
Posted Date: 02 Oct 2025

Senior Network-on-Chip (NoC)/Fabric Engineer

system interconnect fabrics; own full RTL design cycle including coding, integration of third-party IPs, synthesis readiness...Senior Network-on-Chip (NoC)/Fabric Engineer US Citizen or US Permanent Resident San Jose, California or remote...

Location: San Jose, CA
Posted Date: 01 Oct 2025

Strategic Sourcing Engineer, Silicon

). Strong knowledge of SoC design flow including RTL, synthesis, place-and-route, timing analysis, and verification. Experience dealing... fast. Strategic Sourcing Engineer, Silicon Mission: focus on the evaluation and technical support of EDA, chiplets...

Company: Groq
Location: San Jose, CA
Posted Date: 26 Sep 2025

Silicon Power Analysis and Optimization Engineer

design 2) Proficiency in RTL design languages like Verilog or VHDL 3) Proficiency in programming languages like Perl... the development phases - Support RTL and gate-level power rollup and analysis - Work closely with design...

Company: Managed Staffing
Location: San Jose, CA
Posted Date: 26 Sep 2025

Silicon Power Analysis and Optimization Engineer

design 2) Proficiency in RTL design languages like Verilog or VHDL 3) Proficiency in programming languages like Perl... the development phases - Support RTL and gate-level power rollup and analysis - Work closely with design...

Company: Managed Staffing
Location: San Jose, CA
Posted Date: 25 Sep 2025

GNSS Software Engineer

solutions, Offshore Design Centers (ODCs), and staff augmentation across key areas like RTL Design, UVM Verification, Emulation..., FPGA Validation, DFT, RTL-to-GDSII, Physical Design, Mask Layout, and Silicon Bring-up. Our embedded services include...

Company: Prodapt
Location: San Jose, CA
Posted Date: 24 Sep 2025