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Keywords: RTL Lead, Location: Bangalore, Karnataka

Page: 4

PMIC Design Verification Sr Lead Engineer

Strong troubleshooting skills across embedded systems disciplines (digital RTL, Firmware, analog behavioral models) Strong communication...

Company: Qualcomm
Posted Date: 29 Oct 2025

Performance Verification Lead

through modeling and RTL simulation. This role will involve working with SOC and IP architects to evaluate and improve... in debugging RTL code using simulation tools Proficiency with programming and scripting languages (C/C++, Perl, Python...

Posted Date: 24 Oct 2025

Lead Engineer Physical Design

experience implementing complex SoC designs from RTL to GDS Candidate will be responsible to drive die area, performance, power...

Company: Quest Global
Posted Date: 23 Oct 2025

Lead Design Engineer

-verification plan. Develop and Debug firmware in RTL based hardware simulations (C +Verilog simulations) Develop and Debug.... Comfortable debugging RTL simulations involving firmware and microcontroller subsystem. Good knowledge of Shell/Perl/Python...

Posted Date: 12 Oct 2025

DSP / NPU Design Verification Sr Lead Engineer

with timing simulations. · Responsible for power aware RTL verification and gate level simulation. Skillset/Experience: · 3...

Company: Qualcomm
Posted Date: 09 Oct 2025

GPU / CPU physical design Lead

, and excellent problem-solving abilities. KEY RESPONSIBILITIES: Own critical CPU units and drive to convergence from RTL-to-GDSII...

Posted Date: 02 Oct 2025

Urgently Hiring 10 + Years of DFT Lead Engineers_Exposure on SCAN insertion, ATPG and pattern simulation/debug._Bangalore Location_CTC 80 LPA+

DFT, RTL implementation, Verification, Scan and ATPG.  SCAN insertion, ATPG and pattern simulation/debug.  MBIST...

Company: Angel & Genie
Posted Date: 26 Sep 2025

IP Verification Lead( LPDDR/DDR PHY)

flows. Experience with VCS simulation tool, Perl/Shell scripting, and Verilog RTL design Experience of analog and mixed...

Posted Date: 25 Sep 2025

Lead Engineer - Physical Design

level (Top level is +) Block level ownership from RTL/Netlist to GDSII, driving multiple complex designs till signoff, CTS...

Company: Quest Global
Posted Date: 24 Sep 2025

Lead Engineer - FPGA Verification

RTL testbenches from scratch, demonstrating advanced technical skills. Strong knowledge of object-oriented programming...

Company: Ericsson
Posted Date: 18 Sep 2025

GLS Lead

down the most subtle and challenging bugs related to timing, power, and reset that are invisible at the RTL level. The... propagation and synchronization issues. X-propagation bugs masked by optimistic RTL simulation. Initialization failures of flops...

Company: Quest Global
Posted Date: 17 Sep 2025

Technical Lead I - VLSI PD CAD

Backend or Analog design with minimal supervision Outcomes: * Work as an individual contributor owning any one task of RTL...: a. Cadence Synopsys Mentor tool sets (one or more)b. Simulators Lint CDC/RDC DC/RTL-C ICC/Innovus/Olympus ETS/TK/FS PT/Tempus...

Company: UST
Posted Date: 13 Sep 2025

Technical Lead II - VLSI ML

contributor take ownership for any one or more task/module of RTL Design/Module Verification/PD/DFT/Circuit Design/Analog Layout... Tools: a. Cadence Synopsys Mentor tool sets (one or more)b. Simulators Lint CDC/RDC DC/RTL-C ICC/Innovus/Olympus ETS/TK/FS...

Company: UST
Posted Date: 13 Sep 2025

Tech Lead , Digital Design

(Electronics and Communication) 10 to 15 years of hands on Experience in RTL design using (VHDL/Verilog) Experience...

Company: Bosch
Posted Date: 05 Sep 2025

Analog Circuit Design Lead

like RTL, Verification and Physical Design PREFERRED EXPERIENCE: Strong hands-on experience in DDR circuit designs...

Posted Date: 05 Sep 2025

GPU Emulation Verification Sr Lead Engineer

bench, own test plan, debug all RTL artefacts, and achieve all signoff matrices Subsystem level TestBench for complete GPU...

Company: Qualcomm
Posted Date: 29 Aug 2025

Principal DFT Manager

DFT Manager to join the team. #SCHIE Responsibilities: Lead DFT strategy and execution across multiple projects..., boundary scan, MBIST, and JTAG. Collaborate with RTL, physical design, and verification teams to integrate DFT features...

Company: Microsoft
Posted Date: 25 Nov 2025

Senior Software Engineer (WebDriver IO, Cucumber, React/Java)

and motivated Senior Software Developer to lead the development of a robust end-to-end automation framework and actively contribute... automation framework using Cucumber, Behavior-Driven Development (BDD) Jest/ RTL, and WebDriver IO framework Automation...

Company: Autodesk
Posted Date: 23 Nov 2025

PNR PD STA Senior staff

Title: Physical Design Lead (PnR, STA) About GlobalFoundries GlobalFoundries is a leading full-service..., or Mentor OlympusSoC) including RTL synthesis, Place and Route, parasitic extraction and static timing (Synopsys or Cadence...

Posted Date: 23 Nov 2025

Staff/ Senior Staff DFT Engineer

, hierarchical flows, SSN/IJTAG). Lead cross‑functional collaboration with RTL, synthesis, physical design, verification..., above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. Your Team, Your Impact Data Center Engineering Business Unit...

Company: Marvell
Posted Date: 22 Nov 2025