RTL implementation of power driver digital controls for LED/SiC/smartFET/Efuse application, peripherals like I2C, SPI, LIN..., CAN protocols The candidate will work on digital design architecture, digital RTL, low power design, synthesis and timing...
, you will focus on the following: The candidate will lead the digital design architecture, digital RTL, low power design, synthesis... teams in multiple worldwide geographies Drive architecture to micro-architecture to RTL implementation with the refining...
, you will focus on the following: The candidate will lead the digital design architecture, digital RTL, low power design, synthesis... teams in multiple worldwide geographies Drive architecture to micro-architecture to RTL implementation with the refining...
and automotive applications. In this role, you will focus on the following: Work with different product lines for SoC RTL... The candidate will work on digital design architecture, digital RTL, low power design, synthesis and timing analysis...
and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead... at translating their requirements into actionable engineering plans. Your hands-on experience with RTL coding, DFT insertion, ATPG...
sign-off to post silicon bring up. Work closely with RTL, DD, PD, DV and SoC verification teams to integrate the PHY.... Skills & Experience For lead position, candidates must have performed PHY Lead roles which include PHY integration to SOC...
General Summary: Qualcomm's Bangalore WLAN PHY (Baseband) team is seeking VLSI (Sr Staff)Digital Design Engineers to lead IP.... Proficiency in RTL coding and familiarity with RTL QA flows such as PLDRC, CDC, and CLP (optional) is expected. Candidates...
. Lead the team of analog, RTL design and firmware engineers to develop an OBC capable of telemetry, telecommand handling...) to join our dynamic team to conceptualize, architect and lead the development of OBC. The candidate will be responsible for leading a team...
designs that can perform complex and high-performance functions in an extremely efficient manner. Own or lead verification... and coverage signoff in UVM or C++ Substantial background in debugging RTL (Verilog) designs as well as simulation and/or emulation...
, and cross-functional collaboration. Key Responsibilities: Lead controller integration and build a team for product execution... cross-functional teams. Drive RTL design, power-aware architecture (UPF), performance optimization, and synthesis. Own...
. You will have an ASIC design background with hands-on experience in RTL design with in-depth knowledge of ASIC/SoC development cycle, the... specification creation. RTL development (Verilog, SystemVerilog, VCS, Spyglass, CDC, Formal verification) Experienced in system...
: Lead controller integration and build a team for product execution. Drive architecture, micro-architecture, and design... requirements. Collaborate with IP, technology, packaging, and global cross-functional teams. Drive RTL design, power-aware...
. Job Description Position Overview: We are looking for a highly skilled and experienced individual for SoC PD lead position for driving SoC... implementation efforts from RTL to GDSII. This role is pivotal within our talented team of engineers, ensuring that we meet our GDS...
Compile and Build emulation model from delivered RTL Integrate different transactor on Zebu Run sanity check Port... Hands on experince with Zebu Ability to lead Sub System deployment on zebu Good knowledge of AXI,OCP,JTAG,UART...
up, test and debug Design documentation management . The successful candidate will work closely with a project lead..., LCD's, Battery charging, voltage regulators, camera sensors ADC/DACs Embedded programming skills RTL...
industry. You will be in the Silicon One development organization as an ASIC Implementation Technical Lead in Bangalore India... with a primary focus on Design-for-Test. You will work with Front-end RTL teams, backend physical design teams to understand chip...
. Ensure RTL quality with qualifying the design with Gate Level Simulations on netlist. Collaborate closely with designers... and efficient performance. Support testing of design in emulation. Lead all aspects of and manage the ASIC bring-up process...
and sign-off criteria Problem Resolution: Lead complex debugging efforts across RTL and gate-level simulations with minimal... Strategic Leadership: Architect and lead verification strategy for complex digital and mixed-signal designs, acting as a key...
and sign-off criteria Problem Resolution: Lead complex debugging efforts across RTL and gate-level simulations with minimal... Strategic Leadership: Architect and lead verification strategy for complex digital and mixed-signal designs, acting as a key...
industry. You will be in the Silicon One development organization as an ASIC Implementation Technical Lead in Bangalore India... with a primary focus on Design-for-Test. You will work with Front-end RTL teams, backend physical design teams to understand chip...