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Keywords: RTL Verification Engineer, Location: Bangalore, Karnataka

Page: 6

MTS Silicon Design Engineer

_ MTS SILICON DESIGN ENGINEER THE ROLE: The focus of this role is to plan, build, and execute the verification of new... Build the directed and random verification tests Debug test failures to determine the root cause; work with RTL...

Posted Date: 22 Jun 2025

SMTS Silicon Design Engineer

_ Lead Verification Engineer THE ROLE: The focus of this role is to plan, build, and execute the verification of new... Build the directed and random verification tests Debug test failures to determine the root cause; work with RTL...

Posted Date: 22 Jun 2025

Senior DFT Engineer

of Echo devices is looking for a Senior DFT Engineer to continue to innovate on behalf of our customers. We are a part.... Make history. We are seeking a seasoned and strategic Sr DFT Engineer to Lead end-to-end Design-for-Test (DFT) planning...

Company: Amazon
Posted Date: 21 Jun 2025

SMTS STA / Synthesis Engineer

_ SMTS SILICON DESIGN ENGINEER(Timing Constraints/STA Signoff Technical Lead) THE ROLE: As a member of the AECG ASIC... development of complex multi-mode / multi-corner timing constraints that are compatible for RTL and signoff Ensuring constraints...

Posted Date: 21 Jun 2025

MTS Silicon Design Engineer

and execution to drive synthesis, PPA analysis, ECO, and static verification assignments to completion. A forward-thinking engineer..._ Front-End Silicon Design & Integration (FEINT) Engineer The role: A Front-End Silicon Design and Integration (FEINT...

Posted Date: 20 Jun 2025

SERDES PHY Analog Design Engineer

sign-off to post silicon bring up. Work closely with RTL, DD, PD, DV and SoC verification teams to integrate the PHY... Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical...

Company: Qualcomm
Posted Date: 19 Jun 2025

Technical Lead - FPGA IVV Engineer (SV UVM)

technologies and expertise in Defence, Transport, Aerospace and Digital Identity and Security markets. FPGA IVV Engineer... Validation & Verification for Avionics products and solutions. Responsibilities includes development of Test strategy, Virtual...

Company: Thales
Posted Date: 19 Jun 2025

Serdes PHY Analog Design Engineer

sign-off to post silicon bring up. Work closely with RTL, DD, PD, DV and SoC verification teams to integrate the PHY... Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical...

Company: Qualcomm
Posted Date: 19 Jun 2025

Senior Physical Design Engineer

verification, ECO and sign-off. · Work with RTL/logic designers to drive architectural feasibility studies, explore power... of Echo devices is looking for a Senior SoC Integration Design Engineer to continue to innovate on behalf of our customers...

Company: Amazon
Posted Date: 18 Jun 2025

ASIC DFx - MTS Silicon Design Engineer

constraints, verification of DFx logic at RTL and GLS, ATPG and Scan GLS. Work with multi-functional teams and handling schedules..._ AECG ASIC DFx - MTS SILICON DESIGN ENGINEER THE ROLE: AECG SSD ASIC is a centralized ASIC design group within AMD...

Posted Date: 14 Jun 2025

CAD Engineer (Frontend and Backend)​

Role: CAD Engineer (Frontend and Backend) Experience: 10+years Location: Bangalore Notice Period: Max 15days... preferred Role Overview We are looking for a CAD Engineer (Frontend and Backend) to deploy and support our front-end tools...

Posted Date: 14 Jun 2025

Digital Design Engineer

, ADI ensures today's innovators stay Ahead of What's Possible™. Learn more at and on and . Position: Engineer, Digital... closely with system architects Translate the design specification to optimal digital micro-architecture RTL coding using...

Posted Date: 13 Jun 2025

Staff Digital Design Engineer

, ADI ensures today's innovators stay Ahead of What's Possible™. Learn more at and on and . Position: Staff Engineer... by working closely with system architects Translate the design specification to optimal digital micro-architecture RTL coding...

Posted Date: 13 Jun 2025

SMTS Silicon Design Engineer

_ SMTS SILICON DESIGN ENGINEER THE ROLE: The position will involve working with a very experienced physical design team... RESPONSIBILITIES: RTL to GDS2 flow Handling Floor-plan, Physical Implementation of Power-plan, Synthesis, Placement, CTS, , Routing...

Posted Date: 12 Jun 2025

RISC V Processor Engineer

. We would love the opportunity to work with YOU! Requirements 1) Job Title: RISC-V Processor Engineer Skills...: Strong experience in processor architecture and microarchitecture design. Proficiency in RTL design using Verilog/SystemVerilog...

Posted Date: 11 Jun 2025

Senior SOC Design Engineer

Verification, Synthesis, Physical design and DFT is a bonus. Experience in RTL Build flows and Makefiles is a plus. NVIDIA... and see how you can make a lasting impact on the world! NVIDIA System-On-Chip (SOC) group is hiring for a Senior SOC Design Engineer...

Company: Nvidia
Posted Date: 11 Jun 2025

Senior Principal Digital IC Design Engineer

Job Category: Engineering Degree Level: Bachelors Job Description: Senior Principal Digital IC Design Engineer... products and markets. The Role We are expanding the team to India and are looking for a Senior Principal IC Design Engineer...

Company: onsemi
Posted Date: 11 Jun 2025

SMTS Silicon Design Engineer

_ SMTS SILICON DESIGN ENGINEER THE ROLE: We are looking for an adaptive, self-motivative Synthesis/PD/STA engineer... RTL to GDS implementation of complex IPs and supporting the SOC customers Working with RTL team to resolve timing...

Posted Date: 11 Jun 2025

CPU Physical Design Engineer (Lead/Staff)

Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical... activities. Work independently in the areas of RTL to GDSII implementation. Ability to collaborate and resolve issues wrt...

Company: Qualcomm
Posted Date: 11 Jun 2025

Data Analytics and Applied AI Engineer - DFT Methodology

involving crafting creative solutions for DFT architecture, verification, and post-silicon validation on some of the industry... - ATPG, scan, RTL & clocks design, STA, place-n-route and power Experience in application of AI for EDA-related problem...

Company: Nvidia
Posted Date: 09 Jun 2025