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Keywords: SOC Logic Design Engineer, Location: USA

Page: 4

ASIC Design Engineer - Pixel IP DMA

products to millions of customers quickly. Description As a Pixel IP DMA Design Engineer in the Pixel IP team.../SoC front-end ASIC RTL design Tight-knit collaboration skills with excellent written and verbal communication skills...

Company: Apple
Location: Cupertino, CA
Posted Date: 07 Nov 2025

CPU Physical Design Methodology and Optimization Engineer

to work with most teams in CPU design and influence SOC teams as well. You will also be actively contributing to new... with CPU, CAD, and design teams to engineer new flows/algorithms to improve PPA • Detailed analysis across partitions...

Company: Apple
Location: Santa Clara, CA
Posted Date: 06 Nov 2025

CPU Physical Design Methodology and Optimization Engineer

to work with most teams in CPU design and influence SOC teams as well. You will also be actively contributing to new... with CPU, CAD, and design teams to engineer new flows/algorithms to improve PPA • Detailed analysis across partitions...

Company: Apple
Location: Santa Clara, CA
Posted Date: 06 Nov 2025

ASIC Engineer, Physical Design

on Chip (SoC) and IP for data center applications. ASIC Engineer, Physical Design Responsibilities Develop and own... physical design implementation of multi-hierarchy low-power and high-performance designs, including physical-aware logic...

Company: Meta
Posted Date: 06 Nov 2025

Hardware Board Design Engineer

, and more. Position: Hardware Board Design Engineer As an experienced Hardware Board Design Engineer (individual contributor... hardware design. Expertise designing high-speed, dense, multi-layer PCBs and systems. Proficiency in logic design, schematic...

Company: Qualcomm
Location: Santa Clara, CA
Posted Date: 06 Nov 2025

GPU Design Engineer - Memory Hierarchy

help design and manufacture our next-generation, high-performance, power-efficient processor, system-on-chip (SoC). You'll...! Description As a GPU Design Engineer, you will participate in micro-architecture specification and RTL coding. Explore architecture trade...

Company: Apple
Location: Santa Clara, CA
Posted Date: 06 Nov 2025
Salary: $126800 - 190900 per year

GPU DFT Design Verification Engineer

with their devices. The DFT Design Verification Engineer will be on a team which is responsible for the complete DFT pre-silicon... Good knowledge of general logic design, and exposure to DFT is a plus Apple is an equal opportunity employer...

Company: Apple
Location: Austin, TX
Posted Date: 02 Nov 2025

GPU DFT Design Verification Engineer

with their devices. The DFT Design Verification Engineer will be on a team which is responsible for the complete DFT pre-silicon... Good knowledge of general logic design, and exposure to DFT is a plus Apple is an equal opportunity employer...

Company: Apple
Location: Austin, TX
Posted Date: 02 Nov 2025

GPU DFT Design Verification Engineer

with their devices. The DFT Design Verification Engineer will be on a team which is responsible for the complete DFT pre-silicon... multiple priorities Good knowledge of general logic design, and exposure to DFT is a plus Apple is an equal opportunity...

Company: Apple
Location: Austin, TX
Posted Date: 02 Nov 2025

Senior Design Verification Engineer, HW Compute Group

of Echo devices is looking for a Senior Design Verification Engineer to continue to innovate on behalf of our customers... quickly resolve blocking issues. Key job responsibilities Design Verification of Subsystems such as CPU, NPU, and SOC...

Company: Amazon
Location: Sunnyvale, CA
Posted Date: 01 Nov 2025

Physical Design Engineer

hardworking Physical Design Engineer. As a member of our wide-ranging group, you will have the rare and great opportunity to craft..., we will be at the center of a PHY design effort working with architecture, CAD, timing, and logic design teams, with a critical impact...

Company: Apple
Location: Beaverton, OR
Posted Date: 30 Oct 2025

Senior ASIC Design Engineer – Clocks IP

and ability to collaborate with multiple teams. Experience in RTL design (Verilog), verification and logic synthesis... from the crowd: Experience with clocks controller, clocks logic design Understanding of system level artifacts like power...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 29 Oct 2025

Digital IC Design Engineer Intern

, algorithms engineers, and software engineers on a small, agile team. As a Digital IC Design Engineer Intern.... Team Description: The Brain Interfaces Soc Department delivers chip architecture and silicon implementation of neural...

Company: Neuralink
Location: Fremont, CA
Posted Date: 28 Oct 2025
Salary: $35 per hour

Specialist, Electrical Engineer (ASIC / FPGA Design Engineer)

security. Job Title: Specialist ASIC/FPGA Design Engineer Job Code: 30424 Job Location: Herndon, VA (on-site) Schedule... countries. Job Description: Reporting to the Manager, Engineering (ASIC/FPGA), the Design Engineer will be part of the key...

Location: Herndon, VA
Posted Date: 26 Oct 2025
Salary: $90500 - 168500 per year

Sr. Specialist, Electrical Engineer (ASIC / FPGA Design) Engineer)

security. Job Title: Sr. Specialist ASIC/FPGA Senior Design Engineer Job Code: 30428 Job Location: Herndon, VA (on-site... countries. Job Description: Reporting to the Manager, Engineering (ASIC/FPGA), the Senior Design Engineer will be part...

Location: Herndon, VA
Posted Date: 26 Oct 2025
Salary: $104500 - 193500 per year

ASIC Design Engineer - Pixel IP DMA

products to millions of customers quickly. Description As a Pixel IP DMA Design Engineer in the Pixel IP team.../SoC front-end ASIC RTL design Tight-knit collaboration skills with excellent written and verbal communication skills...

Company: Apple
Location: Cupertino, CA
Posted Date: 25 Oct 2025

Wireless FPGA Prototype Design Engineer

engineering teams. Description As a Wireless ASIC/FPGA Prototyping Design Engineer, you will work in a team developing signal... as a Wireless FPGA Prototype Design Engineer here at Apple? Responsibilities As a Wireless ASIC/FPGA Prototyping Design...

Company: Apple
Location: San Francisco, CA
Posted Date: 25 Oct 2025

Wireless FPGA Prototype Design Engineer

engineering teams. Description As a Wireless ASIC/FPGA Prototyping Design Engineer, you will work in a team developing signal... as a Wireless FPGA Prototype Design Engineer here at Apple? Responsibilities As a Wireless ASIC/FPGA Prototyping Design...

Company: Apple
Location: San Francisco, CA
Posted Date: 24 Oct 2025

Physical Design Engineer

hardworking Physical Design Engineer. As a member of our wide-ranging group, you will have the rare and great opportunity to craft..., we will be at the center of a PHY design effort working with architecture, CAD, timing, and logic design teams, with a critical impact...

Company: Apple
Location: Beaverton, OR
Posted Date: 24 Oct 2025

Physical Design Engineer

hardworking Physical Design Engineer. As a member of our wide-ranging group, you will have the rare and great opportunity to craft..., we will be at the center of a PHY design effort working with architecture, CAD, timing, and logic design teams, with a critical impact...

Company: Apple
Location: Cupertino, CA
Posted Date: 24 Oct 2025