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Keywords: SOC Logic Design Engineer, Location: USA

Page: 6

Senior Engineer, Front End Computer Aided Design

- Be part of a central FE CAD team that drives common FE methodologies for SoC and IP design. - Be the specialist... to, C, C++, C#, Java, JavaScript, or Python - Experience with hand-off to backend and Logic Design compilation, elaboration...

Company: Microsoft
Location: Mountain View, CA
Posted Date: 10 Dec 2025

Senior ASIC Design Engineer

NVIDIA is seeking best-in-class ASIC Design Engineers to design and implement the world’s leading SoC's and GPU... design flow including RTL design, verification, logic synthesis, prototyping, DFT, timing analysis, floor-planning, ECO...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 10 Dec 2025

DFT Design Engineer

to: Develops the logic design, register transfer level (RTL) coding, simulation, and provides DFT timing closure support as well..., and methods to write and generate RTL and structural code to integrate DFT. Optimizes logic to qualify the design to meet power...

Company: Intel
Location: Santa Clara, CA
Posted Date: 09 Dec 2025

DFT Design Engineer

to: Develops the logic design, register transfer level (RTL) coding, simulation, and provides DFT timing closure support as well..., and methods to write and generate RTL and structural code to integrate DFT. Optimizes logic to qualify the design to meet power...

Company: Intel
Location: Santa Clara, CA
Posted Date: 09 Dec 2025

ASIC Design Engineer - New College Grad 2026

NVIDIA is seeking ASIC Design Engineers to implement the world’s leading SoC's and GPU's. This position offers the... development (Verilog). Good understanding of ASIC design flow including RTL design, verification, logic synthesis and timing...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 19 Nov 2025
Salary: $96000 - 161000 per year

Associate FPGA / ASIC Design Engineer

understanding of digital system design at the Boolean logic level Solid understanding of basic circuits and electronic principles... Agilex SoC) Familiarity with all phases of digital design, including architecture, implementation, verification, test...

Company: Mitre
Location: Bedford, MA
Posted Date: 18 Nov 2025

ASIC Design Engineer, Amazon Leo

· Contribute to the SoC floor planning effort · Define and develop any necessary support logic · Configure, instantiate... in SoC design and implementation Preferred Qualifications - 2+ years of full software development life cycle, including...

Company: Amazon
Location: Austin, TX
Posted Date: 15 Nov 2025

ASIC Design Engineer, Amazon Leo

· Contribute to the SoC floor planning effort · Define and develop any necessary support logic · Configure, instantiate... in SoC design and implementation Preferred Qualifications - 5+ years of full software development life cycle, including...

Company: Amazon
Location: Austin, TX
Posted Date: 15 Nov 2025

Lead ASIC Design Engineer, Amazon Leo

and timing. Analyze simulation results, identify and debug logic errors, and propose solutions. Work closely with design... and develop any necessary support logic · Configure, instantiate and integrate 3rd party IP blocks · Understand low power design...

Company: Amazon
Location: Austin, TX
Posted Date: 15 Nov 2025

Physical Design Methodology Engineer

related to Artificial Intelligent/ High Performance Computing SOCs . As a member of the Physical design and SOC teams... design PPA (Power, Performance, Area) and ensure a high-quality design environment for an SOC Full chip / sub-system/ Tile...

Posted Date: 09 Nov 2025

Lead RTL Design Engineer

(QSPI, UART, GPIO), and custom logic. Support system debug, early bring-up, and validation of SoC interfaces and compute... by technology and innovation, but also perpetually driven to design, develop, and test as a trusted partner for Fortune 500...

Company: Quest Global
Location: California
Posted Date: 06 Nov 2025

RTL Design Engineer

Design and implement logic functions that enable efficient test and debug Implement automation to increase design team..., constraints, and waivers Experience with SoC level design integration Experience with automation using scripting techniques...

Posted Date: 06 Nov 2025

RF/Analog Design/Functional Modeling and Verification Engineer – AI/ML Enhanced

Strong understanding of RF-analog and digital logic design. Proficient in SystemVerilog, Python, Perl, C-Shell, and Cadence SKILL... verification workflows to accelerate design cycles and improve quality. Required for this Role: Bachelor's degree...

Company: Qualcomm
Location: Santa Clara, CA
Posted Date: 05 Nov 2025

Staff Physical Design Engineer

performance design flows using industry-standard EDA tools for logic and physical synthesis from Cadence, Synopsys, or a similar... your career. THE ROLE: This is a great opportunity to develop and maintain world-class hardware physical design flow in a fast...

Location: Austin, TX
Posted Date: 04 Nov 2025

Physical Design Engineer Intern - Bachelor's Degree

, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. Your Team, Your Impact Marvell CCDS (Central CAD and Design... Services) PD engineers are working on cutting edge SoC (System on a Chip), ASIC, High Performance Processor, Digital/Analog...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 30 Oct 2025
Salary: $27 - 55 per hour

Principal Design Engineer, ASIC

, and emerging non-volatile memory technologies. Architect and model data path, control path, cache design, and IO interface logic...Define and develop chiplet-based ASIC SOC architectures for memory and storage controllers, utilizing DRAM, NAND...

Company: Micron
Location: Richardson, TX
Posted Date: 25 Oct 2025

Wireless RTL Design Engineer

and other documents based on MATLAB/C system model Microarchitecture definition RTL logic design and verification support Running tools... Good knowledge in modern design techniques and energy-efficient/low power logic design Ability to work well in a team...

Company: Apple
Location: Los Angeles, CA
Posted Date: 25 Oct 2025

Wireless RTL Design Engineer

and other documents based on MATLAB/C system model Microarchitecture definition IP integration, RTL logic design, and verification... in modern design techniques and energy-efficient/low power logic design Ability to work well in a team and be productive...

Company: Apple
Location: Los Angeles, CA
Posted Date: 25 Oct 2025

Wireless RTL Design Engineer

/C system model RTL logic design and verification support Running tools to ensure lint-free design Collaboration.... Have taken relevant courses such as DSP/wireless communications/machine learning and VLSI logic design Understanding of DSP...

Company: Apple
Location: Sunnyvale, CA
Posted Date: 25 Oct 2025
Salary: $126800 - 190900 per year

FE Design and Timing Engineer

to Post Synthesis netlist. Exposure to industry standard Timing, Logic Equivalence, Physical Design and Synthesis tools... Verilog to collaborate with our logic design team for timing fixes and functional ECOs. Preferred Qualifications Hands...

Company: Apple
Location: San Diego, CA
Posted Date: 24 Oct 2025