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Keywords: SOC level verification - PCIE, USB, Ethernet, Location: Bangalore, Karnataka

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SOC Design Verification Engineer

Responsibilities Develop System Verilog/UVM-based testbenches for IP, subsystem, or SoC-level verification. Create and maintain... VIPs (AXI, AHB, APB, CXL,UCIe, PCIe, DDR, Ethernet, USB, etc.). Strong communication and teamwork skills. Experience...

Company: Intel
Posted Date: 24 Jan 2026

Infra-Staff Design Verification Engineer

, Electronics, or Computer Engineering. 8-12+ years of ASIC/Subsystem/SoC verification experience. Experience with PCIe, USB...-speed interconnect protocols including PCIe, CXL, AXI, and CHI. Perform block-level and top-level verification, including...

Company: Qualcomm
Posted Date: 12 Feb 2026

Senior Design Verification Engineer

such as DDR/ Ethernet/ USB etc using leading edge methodologies like UVM & Formal DV Architect the testbench and develop the... for block / sub-system level verification. Work with design team in generating test-plans and closure of code and functional...

Posted Date: 15 Jan 2026

SOC Engineering, Sr Manager

Proficiency with interface protocols (AMBA APB/AXI/CHI, DDR, PCIe, Ethernet, USB, UFS, etc.) Experience with synthesis, lint, CDC...,-age,-military-veteran-status,-or-disability. /span /p custom_fields.SubCategory-SOC-Engineering custom_fields...

Company: Synopsys
Posted Date: 30 Jan 2026

Design Lead Engineer

and integration for industry-standard protocols, including PCIe, Ethernet, USB, and HDMI. Design Excellence: Perform and oversee... for complex IP blocks and SoC subsystems using Verilog and SystemVerilog. Micro-Architecture: Lead the translation of high-level...

Company: Best NanoTech
Posted Date: 16 Feb 2026

Senior Engineer, ASIC development engineering

such as DDR, PCIe, LPDDR, USB, Ethernet, I²C, I3C, SPI, AXI, AHB, and APB. Emulation Experience: Run complex SoC verification... to enable datapath, integration, and SoC-level validation and verification. Language Proficiency: Should have a very good...

Company: SanDisk
Posted Date: 15 Feb 2026

Staff Engineer, ASIC development Engineering

such as DDR, PCIe, LPDDR, USB, Ethernet, I²C, I3C, SPI, AXI, AHB, and APB. Emulation Experience: Run complex SoC verification... to enable datapath, integration, and SoC-level validation and verification. Language Proficiency: Should have a very good...

Company: SanDisk
Posted Date: 12 Feb 2026

ASIC digital Design, Architect

UVM, BFM development). Proficiency with industry-standard interface protocols (AMBA APB/AXI/CHI, DDR, PCIe, Ethernet, USB... subsystems, ensuring seamless interoperability, dataflow alignment, and compliance with SoC-level constraints. Leading cross...

Company: Synopsys
Posted Date: 01 Feb 2026

Lead Product Engineer

related to protocols such as UCIe, PCIe, USB, DPHY and Ethernet PHYs. The role will be a key member of technical staff.... Position Requirements Experience working with UCIe, PCIe, Ethernet, 112G or similar interface IP. Verilog RTL design...

Posted Date: 14 Jan 2026

DV Lead Engineer

or more High-Speed Interface Verification ( PCIE/USB/Ethernet/DDR*) Optional Preferred Skills Exposure to Formal Verification... Subsystem/SOC Design Verification for an ARM based SoC Design. Extensive experience in SV/UVM based SOC or IP Verification...

Company: Quest Global
Posted Date: 20 Dec 2025

Associate III - VLSI DFT CAD

Architecture Functional Spec Test Plan Verificationb. Strong in Bus Protocol AHB/AXI/PCIe/USB/Ethernet/SPI/I2C Microprocessor... of RTL Design/Module and provide support to junior engineers in Verification/PD/DFT/Circuit Design/Analog Layout/STA...

Company: UST
Posted Date: 17 Dec 2025

SystemC Engineer

, Android ) on the virtual prototype, developing the device drivers etc. · Verification of models at IP & SoC level... development · Developing SystemC/TLM2.0 based models of IP blocks, CPU, SoC, System · Defining transaction level models of non...

Company: UST
Posted Date: 05 Dec 2025

Technical Lead I - VLSI

Functional Spec Test Plan Verificationb. Bus Protocol AHB/AXI/PCIe/USB/Ethernet/SPI/I2C Microprocessor architecturec... with x86/ARM SoC architecture and protocols (PCIe, DDR, USB, etc.). • Leadership/mentorship exposure preferred. Skills: Soc...

Company: UST
Posted Date: 04 Dec 2025

Technical Lead I - VLSI

Functional Spec Test Plan Verificationb. Bus Protocol AHB/AXI/PCIe/USB/Ethernet/SPI/I2C Microprocessor architecturec... Design/Module. Provide support and guidance to engineers in Verification/PD/DFT/Circuit Design/Analog Layout/STA/Synthesis...

Company: UST
Posted Date: 04 Dec 2025

PLATFORM EMULATION ENGINEER

with BIOS/OS bring up on full X86 SOC emulation platform Proficient in IP level ASIC verification, experience working with CPU... of PCIe/USB/Ethernet standards; safety concepts/IPs Must have hands-on experience on Zebu/Palladium/Veloce platform to bring...

Posted Date: 27 Nov 2025

LEAD PLATFORM EMULATION ENGINEER

with BIOS/OS bring up on full X86 SOC emulation platform Proficient in IP level ASIC verification, experience working with CPU... of PCIe/USB/Ethernet standards; safety concepts/IPs Must have hands-on experience on Zebu/Palladium/Veloce platform to bring...

Posted Date: 26 Nov 2025