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Keywords: Senior/Engineer, NAND Wafer Level CMOS Reliability , Location: Singapore

Page: 1

Senior/Engineer, NAND Wafer Level CMOS Reliability & Design

Developing current and future CMOS technology device by working closely with teams across the organization including... as needed. Analyze electrical test structures results, design rule verification, and CMOS process monitoring. Foster a collaborative...

Company: Micron
Location: Singapore
Posted Date: 02 Jul 2025

Senior/Engineer, NAND Wafer Level CMOS Reliability & Design

Developing current and future CMOS technology device by working closely with teams across the organization including... as needed. Analyze electrical test structures results, design rule verification, and CMOS process monitoring. Foster a collaborative...

Company: Micron
Location: Singapore
Posted Date: 01 Jul 2025