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Keywords: Senior Lead IP Design Verification Engineer, Location: Bangalore, Karnataka

Page: 3

Staff/ Senior Staff DFT Engineer

, hierarchical flows, SSN/IJTAG). Lead cross‑functional collaboration with RTL, synthesis, physical design, verification... development, EDA/methodology development and IP/Chip design development. India DFT team is a key part of Global DFT community...

Company: Marvell
Posted Date: 22 Nov 2025

NoC (RTL) Design - PE/Director

and implementation of interconnect and related IP's Actively work with SoC team, verification team, physical design team, SoC Floorplan... General Summary: Design Engineer (18+ years of experience) SoC Interconnect for the next generation System-on-chip (SoC...

Company: Qualcomm
Posted Date: 25 Nov 2025

High Speed Memory/IO Circuit Lead (Mixed Signal)

your career. SMTS SILICON DESIGN ENGINEER THE ROLE: Be part of AMD’s analog/mixed signal IP design team responsible for the... design and development of next generation IOs, high speed memory (gDDRx, HBMx) and die-to-die Gbps proprietary PHY IP...

Posted Date: 19 Nov 2025

Sr. Lead Software Development Eng

your career. Sr. LEAD SOFTWARE DEVELOPMENT ENGINEER THE ROLE: We are seeking an engineer to join our team that will thrive... firmware during SOC bring-up. Partner with HW and Silicon validation teams for verification of all features in the Silicon IP...

Posted Date: 14 Nov 2025

Sr Software Quality Engineer I

across our global community. The Role We are looking for a Senior Software Quality Engineer to create and execute testing approaches... while collaborating with R&D and Product Management. Your Impact Design, build, execute, and maintain test automation including...

Posted Date: 28 Sep 2025

Sr Software Quality Engineer I

across our global community. The Role We are looking for a Senior Software Quality Engineer to create and execute testing approaches... while collaborating with R&D and Product Management. Your Impact Design, build, execute, and maintain test automation including...

Posted Date: 28 Sep 2025

Principal Engineer - SOC Clocking

with RTL, physical design, verification, and DFT teams to deliver end-to-end SoC clocking and custom IP. Own the technical...Job Details: Job Description: Key Responsibilities: Lead the architecture, design, and integration of SoC-wide...

Company: Intel
Posted Date: 10 Dec 2025

Associate II - VLSI

from senior engineers Ensure quality delivery as approved by the senior engineer or project lead Measures of Outcomes... of VLSI Frontend Backend or Analog design under minimal supervison from the Lead Outcomes: * As an Individual contributor...

Company: UST
Posted Date: 29 Oct 2025

Associate II - VLSI DFT

from senior engineers Ensure quality delivery as approved by the senior engineer or project lead Measures of Outcomes... of VLSI Frontend Backend or Analog design under minimal supervison from the Lead Outcomes: * As an Individual contributor...

Company: UST
Posted Date: 14 Oct 2025

Associate II - VLSI DFTN

from senior engineers Ensure quality delivery as approved by the senior engineer or project lead Measures of Outcomes... of VLSI Frontend Backend or Analog design under minimal supervison from the Lead Outcomes: * As an Individual contributor...

Company: UST
Posted Date: 14 Oct 2025