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Keywords: Senior RTL Design Engineer, Location: San Jose, CA

Page: 1

Senior SoC RTL Design Engineer (remote)

Senior RTL Design Engineer Remote / work from any US location US Citizen or US Permanent Resident Full-time/employee...-V architecture Logic synthesis and static timing analysis Modeling SoC architectures with FPGAs RTL Design including HVLs and HDLs...

Location: San Jose, CA
Posted Date: 28 Jun 2025

Senior RTL Design Engineer

_ THE ROLE: We are looking for a self-motivated senior design engineer to be part of a leading team to drive and improve..., you will focus on RTL design and validation of high-speed interfaces such as chip-to-chip interconnect, both on system and on package...

Posted Date: 27 Jun 2025

Senior RTL Design Engineer

, which employs over 32,000 people across 80+ locations globally. Prodapt is looking for a Senior RTL Design Engineer who has recent... Design Engineer and experience in RTL coding, synthesis, and/or SoC integration Familiarity with digital design...

Company: Prodapt
Location: San Jose, CA
Posted Date: 06 Jun 2025

Senior RTL Design Engineer

is looking for a Senior RTL Design Engineer who has recent experience working on complex SoCs using RTL Coding from Scratch, Microarchitecture..., or equivalent with Minimum 10+ years of experience as a Digital Design Engineer and experience in RTL coding, synthesis, and/or SoC...

Company: Prodapt
Location: San Jose, CA
Posted Date: 04 Jun 2025

Senior ASIC Design Engineer (eInfochips Inc)

Position: Senior ASIC Design Engineer (eInfochips Inc) Job Description: What candidate will Be Doing: Map multi... methodology. Option to engage in block-level RTL design or block or top-level IP integration. Collaborate with Software, Design...

Location: San Jose, CA
Posted Date: 04 Jul 2025

Senior SoC Design Verification Engineer (remote)

Senior Design Verification Engineer Remote / work from any US location US Citizen or US Permanent Resident preferred... development of novel methodologies and verification techniques Run simulations to verify design against specifications...

Location: San Jose, CA
Posted Date: 04 Jul 2025

Senior ASIC Design Engineer (eInfochips Inc)

Position: Senior ASIC Design Engineer (eInfochips Inc) Job Description: What candidate will Be Doing: Map multi... methodology. Option to engage in block-level RTL design or block or top-level IP integration. Collaborate with Software, Design...

Location: San Jose, CA
Posted Date: 10 Jun 2025

Senior Silicon Design Engineer

_ SENIOR SILICON DESIGN ENGINEER THE ROLE: As a member of the Adaptive and Embedded Computing Group, you will help bring... will work with senior silicon design engineers. The candidate will be highly accurate and detail-oriented, possessing good...

Posted Date: 06 Jun 2025

Senior ASIC Design Engineer (eInfochips Inc)

Position: Senior ASIC Design Engineer (eInfochips Inc) Job Description: What candidate will Be Doing: Map multi... methodology. Option to engage in block-level RTL design or block or top-level IP integration. Collaborate with Software, Design...

Location: San Jose, CA
Posted Date: 16 May 2025

Senior/Principal Datapath Design Engineer

experience in Datapath design and high-speed circuit design. Hands-on experience with RTL writing and synthesis. Knowledge... engineer with a consistent track record in high-speed digital and analog circuit design. You communicate complex concepts...

Company: Micron
Location: San Jose, CA
Posted Date: 02 Jul 2025

Senior ASIC Design Engineer

-architecture specifications and participate in reviews. Implement Verilog RTL to meet timing, performance, and power requirements..., evolve, and support our design methodology. Collaborate with the verification team to address design bugs and close code...

Company: Cisco Systems
Location: San Jose, CA
Posted Date: 06 Jun 2025

Design Verification Engineer

Senior Design Verification Engineer Remote / work from home US Citizen or US Permanent Resident preferred Full-time... of novel methodologies and verification techniques Run simulations to verify design against specifications and analyze results...

Location: San Jose, CA
Posted Date: 12 Jun 2025

Sr. Silicon Design Engineer

_ SENIOR SILICON DESIGN ENGINEER THE ROLE: We are looking for an adaptive, self-motivative design engineer... implementation and micro-architecture RTL coding in Verilog/SystemVerilog Design flow quality checks - Lint, CDC, RDC, LCP...

Posted Date: 28 May 2025

ASIC Design Engineer

, and Wireless products. We design the networking hardware for Enterprises and Service Providers of various sizes, the Public Sector... in dynamic collaboration with Senior micro-architects, designers, verification engineers and interact with cross-functional...

Company: Cisco Systems
Location: San Jose, CA
Posted Date: 12 Jun 2025

Senior Staff Emulation Engineer - ZEBU

solutions, Offshore Design Centers (ODCs), and staff augmentation across key areas like RTL Design, UVM Verification, Emulation..., FPGA Validation, DFT, RTL-to-GDSII, Physical Design, Mask Layout, and Silicon Bring-up. Our embedded services include...

Company: Prodapt
Location: San Jose, CA
Posted Date: 06 Jun 2025

Senior Staff Emulation Engineer - ZEBU

services. We offer turnkey solutions, Offshore Design Centers (ODCs), and staff augmentation across key areas like RTL Design..., UVM Verification, Emulation, FPGA Validation, DFT, RTL-to-GDSII, Physical Design, Mask Layout, and Silicon Bring-up...

Company: Prodapt
Location: San Jose, CA
Posted Date: 04 Jun 2025

Silicon Tooling & Methodology Engineer

success. THE PERSON: A successful candidate will work with senior and junior silicon design engineers across various..._ THE ROLE: As a member of Pre silicon functional infrastructure verification team, you will help automate design...

Posted Date: 25 Apr 2025