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Keywords: Silicon Design Engineer (Design Verification), Location: Pulau Pinang

Page: 4

Graduate Talent (Test Chip Physical Design Engineer)

design execution and flow cover all aspects of physical implementation, verification and DRC LVS signoff. Applying AI/ML... manufacturing operations in its state-of-the-art facilities. The Design Technology Platform (DTP) team in FTD works closely...

Company: Intel
Location: Pulau Pinang
Posted Date: 11 Mar 2026

Graduate Talent (Software EDA Design Automation Engineer)

and back-end design from RTL to GDS, digital and analog, physical design creation, verification, and signoff. Applying AI/ML... manufacturing operations in its state-of-the-art facilities. The Design Technology Platform (DTP) team in FTD works closely...

Company: Intel
Location: Pulau Pinang
Posted Date: 11 Mar 2026

Memory Design Engineer

But Are Not Limited To Provide design solutions for meeting challenging memory design specs for various product segments, Memory Compiler... Design Flow/Methodology development, Design, validation and characterization of Memory Compilers and Interfacing...

Company: Intel
Location: Pulau Pinang
Posted Date: 06 Mar 2026

Physical Design Engineer

field of study. 1 years of relevant experience in silicon design/Physical design and/or TFM development. Experience In The... and SI mitigation strategies, power and timing signoff conditions, and layout and reliability verification. VLSI circuits, design...

Company: Intel
Location: Pulau Pinang
Posted Date: 06 Mar 2026

Graduate Talent (Standard Cell Library Design Engineer)

Job Details: Job Description: In this role, you will contribute to the design, development, verification... Logic synthesis Place-and-route Physical design verification Reliability verification - Scripting experience...

Company: Intel
Location: Pulau Pinang
Posted Date: 06 Mar 2026

Graduate Talent (Standard Cell Library Design Engineer)

Job Details: Job Description: In this role, you will contribute to the design, development, verification... Logic synthesis Place-and-route Physical design verification Reliability verification - Scripting experience...

Company: Intel
Location: Pulau Pinang
Posted Date: 06 Mar 2026

Graduate Talent (Standard Cell Library Design Engineer)

Job Details: Job Description: In this role, you will contribute to the design, development, verification... Logic synthesis Place-and-route Physical design verification Reliability verification - Scripting experience...

Company: Intel
Location: Pulau Pinang
Posted Date: 06 Mar 2026

Graduate Talent (Standard Cell Library Design Engineer)

Job Details: Job Description: In this role, you will contribute to the design, development, verification... Logic synthesis Place-and-route Physical design verification Reliability verification - Scripting experience...

Company: Intel
Location: Pulau Pinang
Posted Date: 06 Mar 2026

Engineer I - Physical Design

and EM (Electromigration) checks to ensure design reliability. Apply metric-driven design techniques to enable first-pass silicon success... We offer all that and more at Microchip Technology Inc. People come to work at Microchip because we help design the technology that runs the world. They stay...

Posted Date: 04 Mar 2026

Memory Design Engineer

design convergence tools including formal equivalence verification, static timing methodology, electrical reliability... would include but are not limited to: Provide design solutions for meeting challenging memory design specs for various product...

Company: Intel
Location: Pulau Pinang
Posted Date: 04 Mar 2026

Physical Design Engineer

, or other related field of study. 1 years of relevant experience in silicon design/Physical design and/or TFM development... Logic equivalent verification debugging Logic design fundamentals #DesignTechnologyPlatform Job Type: Experienced Hire...

Company: Intel
Location: Pulau Pinang
Posted Date: 27 Feb 2026

Staff DFT Design Engineer

strategies and low-power DFT solutions Post-Silicon, Yield & Manufacturing Excellence Lead DFT design to collaborate... to industrial ATE platforms and tester limitations Hands-on experience in DFT design verification is a plus Experience driving...

Company: Altera
Location: Pulau Pinang
Posted Date: 26 Feb 2026

Senior DFT Design Engineer

in DFT design verification is a plus Good debugging, problem-solving, and communication skills Exposure to AI or LLM... Scripting skills (Python, Tcl, Perl) for automation and analysis Experience with DFT or Debug Design Verification Experience...

Company: Altera
Location: Pulau Pinang
Posted Date: 26 Feb 2026

Senior DFT Design Engineer

compliance & testability risks Support post-silicon power-on, test content debug & coverage optimization Timing & Physical Design... with physical design and timing teams Proficiency in Verilog or SystemVerilog Hands-on experience in DFT design verification...

Company: Altera
Location: Pulau Pinang
Posted Date: 25 Feb 2026

ASIC/FPGA Design Engineer

and resolve design and simulation issues, collaborate closely with architects, verification engineers, and system teams to clarify... and perform functional simulation and verification to ensure the designs meet functional and performance specifications. Debug...

Company: Intel
Location: Pulau Pinang
Posted Date: 25 Feb 2026

Staff DFT Design Engineer

solutions Post-Silicon, Yield & Manufacturing Excellence Lead DFT design to collaborate with post-silicon team on silicon power... to industrial ATE platforms and tester limitations Hands-on experience in DFT design verification is a plus Experience driving DFT...

Company: Altera
Location: Pulau Pinang
Posted Date: 13 Feb 2026

ASIC/FPGA Design Engineer

specifications. Debug and resolve design and simulation issues, collaborate closely with architects, verification engineers... solutions and perform functional simulation and verification to ensure the designs meet functional and performance...

Company: Intel
Location: Pulau Pinang
Posted Date: 07 Feb 2026

Staff IP Design Engineer

software tools, specifically for device modeling and soft IP development Hands-on experience in FPGA RTL design, testbench... development, logic verification, timing closure across multi-clock domains and systematic root-cause debugging of functional...

Posted Date: 06 Feb 2026

Staff IP Design Engineer

design, testbench development, logic verification, timing closure across multi-clock domains and systematic root-cause... block RAM, DSP blocks, PLL, oscillators, I/O Gearing, configuration/security or power related silicon features. Experience...

Location: Pulau Pinang
Posted Date: 04 Feb 2026

Staff IP Design Engineer

++ and Python) Hands-on experience in FPGA RTL design, testbench development, logic verification, timing closure and debugging... designing and developing Lattice FPGA software tools at Penang. The candidate will contribute to research, design...

Location: Pulau Pinang
Posted Date: 25 Jan 2026