your career. SENIOR SILICON DESIGN ENGINEER / MTS The Role: As a key member of the S3 SoC DFT Team, the successful candidate..., defining the overall SOC Test STA methodology. Working with the Design team to clean-up all the DFT related constraint issues...
The ICW-SoC Team is searching for a hands-on, team-oriented Emulation Engineer. In this role, the engineer... is a plus. We are looking for a self-motivated and experienced engineer who can work with minimal supervision in our SoC team and be able to work closely...
, and the Astro personal robot. What will you help us create? As an FPGA Engineer, you will be part of an advanced architecture... and write all types tests for stimulus and corner-cases Debug tests with design engineers to deliver functionally correct...
Engineer ADI’s Automotive Wireless Battery Monitoring Systems (wBMS) team in Bangalore works on building Wireless Battery... and RF SOC’s Display technical innovation in test development work on new products to improve test efficiency and test...
requirements across various subsystems on the SoC. Perform detailed analysis of the existing software to provide innovative..., etc. System issue Debug, identify workable solution for system issues including HW/SW optimizations to be fed back to Arch/design...
Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical... across multiple SoC programs. You will drive innovation in design automation, ensure robust tool integration, and mentor a high...
your career. Senior Technical Lead Engineer for Leading the AMD Embedded x86 Silicon Health & Quality Initiative The Role... and knowledge of CPU design to come up with solutions to find and debug any defects seen in silicon. You will drive these efforts...
_ MTS SOFTWARE SYSTEM DESIGN ENGINEER THE ROLE: The AMD Embedded Linux X86 Software Driver development engineering team... is seeking a passionate Linux Kernel Engineer in our Linux Operating Systems team – bring a willingness to learn and absorb new...
Responsibilities The Senior Staff Systems Engineer will work on the architecture & design of serial and bridge IC... automation, industrial connectivity etc. The engineer will participate in all stages of IC product development – proposal, design...
Responsibilities The Principal Power Systems Engineer will work on the architecture & design of power management IC... products which addresses a wide range of applications such as data center, enterprise, notebook and industrial. The engineer...
Responsibilities The Senior Staff Analog IC Design Engineer will develop sophisticated Serial Transceiver ICs... design, Silicon Debug and taking all the way to Production. Very strong communication skills are also must for the role...
Responsibilities The Senior Staff Analog IC Design Engineer will work on the design of sophisticated Power Management... from specs and taking all the way to Production and strong communication skills. Full chip design experience & silicon debug...
_ IP Verification Engineer THE ROLE: The verification team at AMD is looking for a Senior Silicon Design Engineer... (NOC) IPs, subsystem and SOC designs. THE PERSON: You have a passion for modern, complex digital design...
and see how you can make a lasting impact on the world! In this position, you will be expected to plan and implement IP/Cluster/SOC... that S/W is tested. Be involved with post-silicon verification and debug. What we need to see: BS / MS or equivalent experience...
where you make a huge impact in a technology-focused company. What you’ll be doing: Perform full‑chip verification of complex SoC... and verification tools (Verilog/SV or equivalent, Cadence or equivalent simulation tools, debug tools like Indago, GDB etc.). C/C...
at Block/IP/Sub-system/SoC levels. Proficient in SystemVerilog for verification; advanced experience with SVA and UVM... is a strong advantage. Deep knowledge of EDA tools such as Cadence NCSim, SimVision, vManager, and waveform-debug tools from Mentor...
and CAD engineers that creates a wide variety of IP for the chips NVIDIA designs. This group works closely with internal SOC... fulfilled by the DIP group is to develop sophisticated SRAM compilers that are used extensively by our SOC design partners...
and CAD engineers that creates a wide variety of IP for the chips NVIDIA designs. This group works closely with internal SOC... fulfilled by the DIP group is to develop sophisticated SRAM compilers that are used extensively by our SOC design partners...
architecture definition Understand SoC architecture and test requirements. Work very closely with the lead Product/Test... appropriate timing constraints for SCAN/MBIST modes and debug timing violations ATPG flow implementation catering to various...
and CAD engineers that creates a wide variety of IP for the chips NVIDIA designs. This group works closely with internal SOC... fulfilled by the DIP group is to develop sophisticated SRAM compilers that are used extensively by our SOC design partners...