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Keywords: SoC Debug Engineer, Location: Bangalore, Karnataka

Page: 8

Staff RF/MS IC Design Engineer

and debug relevant blocks and systems Analyze the effects of non-idealities on circuit performance Report the results..., and Broadband Gateway Processor SoC technology to our connected home portfolio creating a complete and scalable platform...

Company: MaxLinear
Posted Date: 23 Nov 2025

Senior Verification Engineer - Hardware

, Sub-system or SOC level verification. If you have experience in at least a few of the following domains... standard verification tools for simulation and debug is a requirement Exposure to Formal verification would be excellent...

Company: Nvidia
Posted Date: 22 Nov 2025

Senior Principal Engineer

applications. What You Can Expect Lead the DV execution and sign-off for the entire IP, Subsystem and SoC Define and drive... improvements in DV processes for efficient and high-quality execution Collaborate with IP, Subsystem, and SoC teams on test plan...

Company: Marvell
Posted Date: 22 Nov 2025

Staff/ Senior Staff DFT Engineer

. What You Can Expect Own and define DFT strategy and methodology for complex Subsystem in ASIC/SoC programs, ensuring scalability..., VLSI, or related field with 5 to 12 years of experience in DFT for complex ASIC/SoC designs. Strong fundamentals...

Company: Marvell
Posted Date: 22 Nov 2025

Verification Engineer - Hardware

, Sub-system or SOC level verification. If you have experience in at least a few of the following domains... standard verification tools for simulation and debug is a requirement Exposure to Formal verification would be excellent...

Company: Nvidia
Posted Date: 22 Nov 2025

Senior Verification Engineer - Hardware

, Sub-system or SOC level verification. If you have experience in at least a few of the following domains... standard verification tools for simulation and debug is a requirement Exposure to Formal verification would be excellent...

Company: Nvidia
Posted Date: 22 Nov 2025

DFT Engineer

constraints, and support STA/debug teams in DFT mode timing closure. We are known for our extraordinary people who make the... at SoC level. Knowledge of low power DFT challenges and power-aware ATPG....

Company: Quest Global
Posted Date: 20 Nov 2025

RTL Design(Turing-AI/ML)-Engineer

for Sub-system/SOC integration, function/performance simulation debug. Drive Lint/CDC/FV/UPF checks to ensure design quality... with simulators and waveform debugging tools Working with SOC DFT and PD teams as part of collaterals exchanges Knowledge of logic...

Company: Qualcomm
Posted Date: 20 Nov 2025

CPU Design Verification Engineer

use of methodologies like UPF. o Work closely with system architects, software teams and Soc team to validate system use... cases. o Work closely with emulation team to enable verification on emulators and FPGA platforms. o Debug and triage...

Company: Qualcomm
Posted Date: 20 Nov 2025

Design Verification Senior Principal Engineer

including the CXL product line. What You Can Expect Lead End-to-End SoC DV execution and sign-off · Define and drive... improvements in DV processes for efficient and high-quality execution · Collaborate with IP, Subsystem, and SoC teams on test plan...

Company: Marvell
Posted Date: 16 Nov 2025

Principal Design Verification Engineer

. The SoC family of multi-core CPU processors and Custom SoCs offer best-in-class performance, low power, rich software..., or related fields with 10+ years of experience. Experience with processors and SOC architectures, such as interrupt controllers...

Company: Marvell
Posted Date: 16 Nov 2025

Design Engineer

with digital/analog/RF IP teams to arrive IP configuration at SoC level Drive power topology at SoC level, clock structure... and reset strategy Identify low power opportunities at SoC level Define power intent of SoC Arrive IO requirements/muxing...

Company: Infineon
Posted Date: 15 Nov 2025

Senior Embedded Software Engineer - Bangalore, India

documentation, test-plan generation and execution, peer design and code reviews, process feedback and improvements Debug...: Microcontrollers, SoC, device drivers, hardware bringup, power management, performance optimization or hardware/software integration...

Company: Aeva
Posted Date: 14 Nov 2025

ASIC Engineer

more exciting applications. You will get to work on high performance GPU / SOC/ CPU across Memory sub-systems, Graphic processing... test plans, tests and verification infrastructure for complex IP's/sub-system/SOC's. Creating verification environment...

Company: Nvidia
Posted Date: 13 Nov 2025

RTL Design(Turing-AI/ML)-Sr Engineer/Sr Lead

, transaction flow, pipeline, low power etc. Perform as well as lead a team of engineers on RTL coding for Sub-system/SOC... integration, function/performance simulation debug. Drive Lint/CDC/FV/UPF checks to ensure design quality. Develop Assertions...

Company: Qualcomm
Posted Date: 12 Nov 2025

Design Verification Senior Principal Engineer

across IP, Subsystem, and SoC levels for test plan - development, execution, debug, coverage closure, and gate-level simulations.../Career solutions including the CXL product line. What You Can Expect Lead End-to-End SoC DV execution and sign-off...

Company: Marvell
Posted Date: 12 Nov 2025

Senior Verification Engineer, Performance

+ years of experience preferably in the areas of CPU / SOC Performance Verification and Analysis Strong understanding... Verilog. Knowledge of verification methodologies and tools for IP and SoC level verification. Experience with System...

Company: Nvidia
Posted Date: 11 Nov 2025

Design Verification Engineer

, verification code writing, tests and RTL debug, verification closure.Experience writing in SystemVerilog/UVM or Specman/E.Preferred...: Experience in "Full Chip" verification of large SoC chipsCreating and using verification components and environments in standard...

Company: Qualitest
Posted Date: 01 Nov 2025

Embedded Engineer - Automotive

in accordance with system requirements. Debug root-cause and fix variety of hardware and software technical problems and work... contents Execute and generate test results along with debug logs. Fix the static and dynamic analysis violations to deliver...

Company: UST
Posted Date: 01 Nov 2025

DFT Engineer

constraints, and support STA/debug teams in DFT mode timing closure. We are known for our extraordinary people who make the... at SoC level. Knowledge of low power DFT challenges and power-aware ATPG....

Company: Quest Global
Posted Date: 31 Oct 2025