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Keywords: Synopsys, Location: Bangalore, Karnataka

Page: 10

SOC DFT & Test Manager

environments, including diagnostic log analysis and tester pattern debug. Proficiency with major EDA tools (Synopsys, Cadence...

Posted Date: 04 Dec 2025

Technical Lead I - VLSI

: a. Cadence Synopsys Mentor tool sets (one or more)b. Simulators Lint CDC/RDC DC/RTL-C ICC/Innovus/Olympus ETS/TK/FS PT/Tempus...

Company: UST
Posted Date: 04 Dec 2025

Technical Lead I - VLSI

: a. Cadence Synopsys Mentor tool sets (one or more)b. Simulators Lint CDC/RDC DC/RTL-C ICC/Innovus/Olympus ETS/TK/FS PT/Tempus...

Company: UST
Posted Date: 04 Dec 2025

Formal Verification Lead

-on expertise with formal verification tools (Synopsys VC Formal, JasperGold, Questa Formal / or equivalents). Deep understanding...

Posted Date: 04 Dec 2025

MBIST CAD/Methodology Development Engineer, Senior Lead

, memory repair, and diagnostics. Strong hands-on experience with MBIST EDA tools (e.g., Synopsys SMS, Tessent MBIST...

Company: Qualcomm
Posted Date: 04 Dec 2025

Senior Staff Engineer Verification

+ spectre/ Synopsys XA-VCS/ Mentor Eldo ADMS Automation: Perl/python/shell Schedule and result oriented execution mindset...

Company: Infineon
Posted Date: 27 Nov 2025

FPGA Design Verification Engineer

-standard verification tools (e.g., QuestaSim, Synopsys VCS, Haps). Experience with high-speed I/O design and protocols...

Company: UST
Posted Date: 27 Nov 2025

NoC (RTL) Design - PE/Director

with Synopsys design complier, DFT, verification, formal verification, silicon debug Working knowledge of Lint, CDC, PLDRC, CLP...

Company: Qualcomm
Posted Date: 24 Nov 2025

PNR PD STA Senior staff

. Deep hands-on experience with digital implementation tools and flows (i.e. Synopsys ICC/ICC2, Cadence EDI/INNOVUS..., or Mentor OlympusSoC) including RTL synthesis, Place and Route, parasitic extraction and static timing (Synopsys or Cadence...

Posted Date: 22 Nov 2025

Staff Analog and Mixed Signal Design Engineer

at transistor level circuit design, simulation, verification using modern EDA tools from Cadence, Siemens, Synopsys...

Company: AMETEK
Posted Date: 22 Nov 2025

Principal Physical Design Engineer

; experience with advanced FinFET nodes is a plus. Expert knowledge of EDA tools for physical design: Cadence Innovus, Synopsys...

Posted Date: 21 Nov 2025

Display Synthesis Sr/Lead/Staff

development in addition to running/analyzing/debugging designs. Hands on with Synopsys DCG/Genus/Fusion Compiler. Hands... on with Synopsys Prime Time including constraint development for complex blocks with multiple clock domains. Hands on with Cadence...

Company: Qualcomm
Posted Date: 20 Nov 2025

Design Verification Engineer

such as Synopsys VCS Advanced debug skills for simulation and waveform analysis. Scripting proficiency in Python, Perl, or similar...

Posted Date: 20 Nov 2025

Airflow Infrastructure & Automation Engineer – Silicon Design, Sr

Airflow solutions (MWAA, GCP Composer). Familiarity with EDA tools (Synopsys, Cadence) or silicon design flows. Knowledge...

Company: Qualcomm
Posted Date: 19 Nov 2025

Principal DFT Engineer

tools: Synopsys DFT Compiler, Tessent, Cadence Modus, or equivalent. Scripting abilities (TCL, Python, Perl) for DFT...

Posted Date: 19 Nov 2025

Design Verification Senior Principal Engineer

. Exposure to Cadence, Synopsys, Mentor and/or ARM verification tools. Experience with assertion-based formal verification tools...

Company: Marvell
Posted Date: 16 Nov 2025

SOC Design Verification Engineer

). Experience with simulation tools (e.g., Cadence, Synopsys, Mentor Graphics). Strong debugging and problem-solving skills...

Company: UST
Posted Date: 15 Nov 2025