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Keywords: System Design Engineer, Location: Santa Clara, CA

Page: 6

Senior Mixed Signal Design Validation Engineer

of what’s possible. We are looking for an experienced Mixed Signal Design Validation Engineer with a strong background in LPDDR, GDDR, and HBM memory technologies. As part... and overall system performance Work closely with multi-functional teams, including Mixed signal design, PISI team, hardware...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 13 Apr 2025

Senior Mixed Signal Design Engineer

needle! We are looking for a senior engineer to be part of the mixed-signal design team building next generation NVLINK... requirements and complete design from schematic, layout, and verification to characterization. Conduct schematic design of deep...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 10 Apr 2025

Physical Design Methodology CAD Engineer

detail? As part of our Silicon Technologies group, you'll help design and manufacture our next-generation, high-performance..., power-efficient processor, system-on-chip (SoC). You'll ensure Apple products and services can seamlessly and efficiently...

Company: Apple
Location: Santa Clara, CA
Posted Date: 03 Jul 2025

ASIC Design Engineer - New College Grad 2025

is also handling the architecture, design, and synthesis of multiple System-level modules. What you’ll be doing: Be an integral... part of the System ASIC Design team to help develop and improve our RTL and SOC designs Collaborate with architects, ASIC...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 29 Jun 2025
Salary: $96000 - 184000 per year

SoC Design Engineer

according to PRD/design specification and system architecture of SoC CIS products, following ASIC design flow: coding..., cadence Virtuoso, Design Compiler, Integrator, and Verilog and System Verilog programming languages etc.; Conduct design...

Company: OmniVision
Location: Santa Clara, CA
Posted Date: 26 Jun 2025
Salary: $151091 - 155000 per year

SoC Design Engineer

according to PRD/design specification and system architecture of SoC CIS products, following ASIC design flow: coding..., cadence Virtuoso, Design Compiler, Integrator, and Verilog and System Verilog programming languages etc.; Conduct design...

Company: OmniVision
Location: Santa Clara, CA
Posted Date: 24 Jun 2025
Salary: $151091 - 155000 per year

Senior Principal Digital IC Design Engineer

, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. Your Team, Your Impact Our design team works on state...-of-the-art datacenter and AI SOCs. As a member of the R&D team, you will design world-class hardware for the industry...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 22 Jun 2025

ASIC Design Engineer

, including hands-on experience in ASIC chip design and integration. Requires knowledge of Verilog, system Verilog, C or C... cases for the module level and chip level. Participate in FPGA emulation and post-silicon validation. Write design...

Company: OmniVision
Location: Santa Clara, CA
Posted Date: 22 Jun 2025
Salary: $120000 - 145000 per year

Design Verification Engineer

and the functional verification on hardware at the IP, sub-system, SoC and system/architecture level for wireless and wired... targets. Participates at design reviews and project meetings. Will accept a Master's Degree (or foreign academic equivalent...

Company: Qualcomm
Location: Santa Clara, CA
Posted Date: 20 Jun 2025
Salary: $151091 - 161200 per year

Senior Design Verification Engineer

plans and the functional verification on hardware at the IP, sub-system, SoC and system/architecture level for wireless... regression and close test plan targets. Act as a strong contributor at design reviews and project meetings.'' Will accept...

Company: Qualcomm
Location: Santa Clara, CA
Posted Date: 15 Jun 2025
Salary: $138452 - 190000 per year

Principal Design Verification Engineer

, advanced die-to-die and packaging technology, and optimized low-power techniques.As part of the Marvell Data Center Design... that each design meets our customers’ specifications whether they’re a major hyperscaler company or telecom organization...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 15 Jun 2025
Salary: $146850 - 220000 per year

Senior Principal Design Verification Engineer

, advanced die-to-die and packaging technology, and optimized low-power techniques. As part of the Marvell Data Center Design... that each design meets our customers’ specifications whether they’re a major hyperscaler company or telecom organization...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 15 Jun 2025

Principal Design Verification Engineer

, advanced die-to-die and packaging technology, and optimized low-power techniques.As part of the Marvell Data Center Design... that each design meets our customers’ specifications whether they’re a major hyperscaler company or telecom organization...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 14 Jun 2025
Salary: $146850 - 220000 per year

GPU Design Engineer - Memory Hierarchy

help design and manufacture our next-generation, high-performance, power-efficient processor, system-on-chip (SoC). You'll.... Join us to help deliver the next groundbreaking products containing an Apple designed GPU. As part of the GPU Memory Hierarchy Design...

Company: Apple
Location: Santa Clara, CA
Posted Date: 12 Jun 2025

Sr. Engineer, Digital IC Design

Knowledge of Verilog/System Verilog Knowledge of basic digital design logic Familiar with digital design frontend flows... provide automotive infotainment and electronic controllers. What You Can Expect Design and implement digital circuits...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 08 Jun 2025
Salary: $89360 - 133900 per year

Design Verification Engineer, Senior Staff

. Strong understanding of digital design principles and methodologies. Hands-on experience on using Verilog, System Verilog and C... in ASIC and SOC design blocks. Debug failures in tests and root cause issues with test environment and design. Write...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 30 May 2025
Salary: $124420 - 186400 per year

RF/Analog IC Design Engineer

Job Description: Company: Qualcomm Atheros, Inc. Job Area: Engineering Group, Engineering Group RFIC Design... General Summary: Define, design and develop complex radio frequency integrated circuits in complex SoC’s and discrete RFIC...

Company: Qualcomm
Location: Santa Clara, CA
Posted Date: 30 May 2025

Senior Mixed Signal Design Validation Engineer

in the world. Join us at the forefront of technological advancement. As a member of our Mixed Signal Design Validation team..., you will be responsible for the bring-up and characterization of high-speed mixed-signal circuits, in addition to performing system validation...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 24 May 2025

SoC Design Engineer

pipes according to PRD/design specification and system architecture of SoC CIS products, following ASIC design flow. Coding..., cadence Virtuoso, Design Compiler, Integrator, and Verilog and System Verilog programming languages. Work on enhancing the...

Company: OmniVision
Location: Santa Clara, CA
Posted Date: 30 Apr 2025
Salary: $151091 - 155000 per year

Staff R&D Electrical Eng, Systems - Shockwave

-system/component qualification and design, and serve on multiple cross-functional initiatives for projects ranging... for design verification, bench testing, and manufacturing needs Experience with JAMA requirements management system preferred...

Location: Santa Clara, CA
Posted Date: 04 Jul 2025
Salary: $121000 - 194350 per year