of experience in IP/Subsystem/SoC Verification Expertise in design verification methodologies using SystemVerilog UVM and/or formal... verification techniques Experience in defining Testbench Architecture for complex IP’s, Subsystems and SoC’s Strong knowledge...
your career. SENIOR SILICON DESIGN ENGINEER THE ROLE (SOC Verification Engineer: SOC CLK RST & Power Management): Work on SOC... level verification activities, the person will be responsible for bringup verification of CLK across SOC, RST across SOC...
whenever needed Own complex part of design verification. Mentor juniors and be responsible of getting work done from others. Tasks... independently. Participate verification reviews and key debugs. Always strive for excellent and work on verification quality...
your career. SMTS SILICON DESIGN ENGINEER THE ROLE (SOC Verification Lead): Drive and lead the SOC level verification... to person for SOC verification/Concurrency/Coherency/Consistency/System level understanding/IP deployment/integration activities...
, Design Verification Experience: Minimum 6 years Requirements: Extensive hands-on experience (6+ years) in digital... verification using SystemVerilog (SV) and UVM methodology Proven expertise in developing verification plans for complex digital...
Candidate should have strong background in digital verification to develop advanced test benches using System Verilog... verification to develop advanced test benches using System Verilog and UVM. Should have developed multiple verification...
Verification Engineer is responsible for full‑chip and block‑level signoff of advanced ASIC/SoC designs, ensuring manufacturability... and compliance with foundry design rules and internal quality standards. The role involves driving physical verification...
to flagship Wireless IP development covering WAN, WLAN, GNSS, and Bluetooth technologies. Own end-to-end IP-level verification..., including: Design analysis and verification planning. Developing test benches and writing test cases using SystemVerilog/UVM...
to flagship Wireless IP development covering WAN, WLAN, GNSS, and Bluetooth technologies. Own end-to-end IP-level verification..., including: Design analysis and verification planning. Developing test benches and writing test cases using SystemVerilog/UVM...
for blocks, subsystems, and top-level verification. Develop and maintain UVM-based verification environments. Define and review... regression, debug failures, and analyze coverage. Drive verification to meet coverage targets. Contribute to next-gen data...
verification of complex Qualcomm propriety DSP/NPU IP · DSP team is responsible for delivering high-performance DSP/NPU cores... from chipsets and royalties from intellectual property. Job Responsibilities: · Drive design verification of DSP IP by working...
to flagship Wireless IP development covering WAN, WLAN, GNSS, and Bluetooth technologies. Own end-to-end IP-level verification..., including: Design analysis and verification planning. Developing test benches and writing test cases using SystemVerilog/UVM...
the verification scope, develop test plans, tests, and the verification infrastructure and verify the correctness of the... alongside other members of the verification team to analyze, develop and execute verification test cases and able to provide...
Leadership Define and own verification strategy for IP/Block/Subsystem-level DV. Guide the team in developing robust... verification environments and methodologies. Ensure best practices in coverage-driven and assertion-based verification. Execution...
to flagship Wireless IP development covering WAN, WLAN, GNSS, and Bluetooth technologies. Own end-to-end IP-level verification..., including: Design analysis and verification planning. Developing test benches and writing test cases using SystemVerilog/UVM...
. GPU Formal Verification Engineer In the role of GPU Formal Verification Engineer, your project responsibilities... to learn, improve and deliver The pre-Si verification team in Bangalore is currently heavily involved in the following UVM...
. As a Power Aware Design Verification (DV) Engineer, you will own low-power verification of advanced GPU IP blocks and subsystems..., ensuring robust power intent implementation and UPF-driven power-aware verification across multiple GPU generations...
your career. SENIOR SILICON DESIGN ENGINEER THE ROLE (SOC Verification Engineer: Security DV ): Work on SOC level... verification activities for Security (Publick key, Quantum key, Memory protection, Config protection, Encryption/Decryption...
As a Design verification engineer in the Data Processing Unit team you will be validating silicon to solve complex...-Silicon SoC verification, Post-Silicon/FPGA validation by defining testing strategies Work with Cross functional teams...
Responsible for overall sub-system verification and SoC verification from test plan creation, UVM development... to signoff. Ensure first pass product through multi-dimensional verification coverage Proven track record of building testplan...