experience / Master's Degree or equivalent experience in Electrical or Computer Engineering with 7+ years of ASIC design. Prior... Verilog RTL to meet timing, performance, and power requirements. Contribute to full chip integration and timing methodology...
coding with System Verilog assertions Well-versed in all stages of the ASIC design flow (including specification... of experience. Experience in creating architectural, micro-architectural, and register specifications. Verilog/System Verilog RTL...
design verification experience. Proficient in ASIC verification using UVM/System Verilog. Proficient in verifying complex... and review of code and functional coverage. Ensure RTL quality with qualifying the design with Gate Level Simulations on netlist...
with minimal mentorship. Who You Are You are an ASIC Design for Test Hardware Engineer with 10+ years of related work... Lead in Bangalore India with a primary focus on Design-for-Test. You will work with Front-end RTL teams, backend physical...
Job Description Design key digital blocks such as data path IPs(DSP functions, accelrators) in Verilog/ System Verilog with built... Minimum B.E. / B.Tech degree in Electrical/Electronics/Computer science 4 - 8 years of digital logic design and hands-on RTL...
design, CDC, ASIC synthesis, timing analysis and CDC, P&R, UPF and system Verilog (assertion) Solid understanding of Verilog...Job Description: Responsibilities: OnSemi is seeking a Staff Digital design engineer, NEW PRODUCT DEVELOPMENT...
design, CDC, ASIC synthesis, timing analysis and CDC, P&R, UPF and system Verilog (assertion) Solid understanding of Verilog...Job Description: Responsibilities: OnSemi is seeking a Sr. Prin Digital design engineer, NEW PRODUCT DEVELOPMENT...
progress and status Solid understanding of RTL design, CDC, ASIC synthesis, timing analysis and CDC, P&R, UPF and system...Job Description: Description: Responsibilities OnSemi is seeking a Senior Principal Digital design Engineer, NEW...
: 6-10 years of strong experience in design verification Strong knowledge of HDLs like Verilog, System Verilog Proven... supervision. Candidate must be able to take ownership of IP/Block/Sub-System verification. Incumbent will be analyzing HW design...
: 3-10 years of strong experience in design verification Strong knowledge of HDLs like Verilog, System Verilog Proven... supervision. Candidate must be able to take ownership of IP/Block/Sub-System verification. Incumbent will be analyzing HW design...
. 10+ years ASIC design verification or related work experience. Preferred Qualitifcations Leadership skills enabling... coverage, code coverage, assertion methodology, formal verification Behavioral modeling of analog blocks, System Verilog Real...
/Electronics/Computer science 4 - 8 years of digital logic design and hands-on RTL coding experience using Verilog...: Designkey digital blocks such as accelerators/ datapath IP in Verilog/ System Verilog with built-in configurability to allow...
/Electronics/Computer science 2 - 6 years of digital logic design and hands-on RTL coding experience using Verilog... key digital blocks such as accelerators/ datapath IP in Verilog/ System Verilog with built-in configurability to allow...
/Electronics/Computer science 4 - 8 years of digital logic design and hands-on RTL coding experience using Verilog...: Designkey digital blocks such as accelerators/ datapath IP in Verilog/ System Verilog with built-in configurability to allow...
: 6-10 years of strong experience in design verification Strong knowledge of HDLs like Verilog, System Verilog Proven... supervision. Candidate must be able to take ownership of IP/Block/Sub-System verification. Incumbent will be analyzing HW design...
_ MTS SILICON DESIGN ENGINEER (AECG ASIC - SoC Design Verification Lead) THE ROLE: The focus of this role is to plan... specs Good understanding and exposure to SoC design and architecture 10+ years of Design Verification experience...
RTL design using Verilog/System Verilog. Works with verification teams in defining the test plan and reviews the test... silicon validation support in bringing up parts. Qualifications: Minimum 10 years of solid ASIC logic/Digital design...
Role: Senior CAD Engineer Experience: 10+years Location: Bangalore Notice Period: Max 15days preferred Role... to have B.Tech/B.E in Computer Engineering (or allied discipline e.g. Electrical, Electronics) 10+ years of relevant...
-to-haves Experience with Kubernetes or LSF Systems Experience with HW Design Flows, System Verilog, Verilog, EDA/CAD....Tech/B.E in Computer Engineering (or allied discipline e.g. Electrical, Electronics) 10+ years of relevant experience...