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Keywords: ASIC Test Chip Physical Design Architect, Location: Leuven, Flemish Brabant

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ASIC Test Chip Physical Design Architect

ASIC Test Chip Physical Design Architect What you will do We are seeking a motivated engineer/ experienced ASIC... collaboration with different teams (device, integration, analog design, test,...) You would be responsible for: Test chip...

Company: Imec
Posted Date: 21 Aug 2025

DFT Architect

, diagnose memory and scan issues. Work closely with the physical design team in the context of timing violations, signal/power... in digital ASIC design, 10+ years of experience with DFT insertion and ATPG. Basic fluency with Verilog/VHDL to write code...

Company: Imec
Posted Date: 21 Aug 2025