architecture fuels next-gen connectivity with 5G and 6G capabilities. We are expanding our ASIC IP unit in Stockholm and Lund... you bring Expertise in ASIC or FPGA verification at IP, sub-system, and chip levels, using SystemVerilog UVM. Possibly over 8...
Expertise in RTL design and microarchitecture using Verilog/SystemVerilog, including FSMs, pipelines, and clocking. Good understanding of functional verification methodologies, including SystemVerilog and UVM. Good ability to collaborate wi...