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Keywords: CPU DFT Engineer, Location: Santa Clara, CA

Page: 1

CPU DFT Engineer

Summary: As a DFT Engineer you will work with chip architects, chip designers, implementation engineers and test engineers...Company: Qualcomm Technologies, Inc. Job Area: Engineering Group, Engineering Group > CPU Engineering General...

Company: Qualcomm
Location: Santa Clara, CA
Posted Date: 03 Mar 2026
Salary: $142200 - 213400 per year

CPU DFT Engineer

ASIC design; experience using Verilog or VHDL Experience with ASIC test, DFT, and debug 3+ years of practical experience... with test or DFT Experience using the Mentor Tessent tools Experience with defining and implementing SOC level verification...

Company: Qualcomm
Location: Santa Clara, CA
Posted Date: 02 Mar 2026

Lead CPU Firmware Verification and Validation Engineer/ Manager

& customer satisfaction. As a Lead CPU FW V&V Engineer, you will take on a lead technical role, working closely with cross... that push the limits of performance, energy efficiency, and scalability. Our focus is on developing CPU platform firmware...

Company: Qualcomm
Location: Santa Clara, CA
Posted Date: 01 Mar 2026

Lead CPU Firmware Verification and Validation Engineer/ Manager

with a focus on smooth integration and Design For Test (DFT) Leverages expert Software knowledge and experience to design, develop...

Company: Qualcomm
Location: Santa Clara, CA
Posted Date: 02 Mar 2026

ASIC Clocks Design Engineer - New College Grad 2026

ASIC engineer to join the team. The Team is responsible for crafting all aspects of GPU and CPU clocking. The team..., we deliver clock RTL information to GPU, CPU and SOC verification team, timing and DFT teams. Get involved in end-to-end cycle...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 01 Feb 2026
Salary: $100000 - 166750 per year

Senior Physical Design Methodology Engineer, Innovus Flows

engineer to be a part of NVIDIA’s physical design (PD) methodology team driving innovation in PD across all of NVIDIA... technology, EDA tools, and PD flows through collaboration with RTL, synthesis, DFT, foundry, timing other cross functional teams...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 25 Jan 2026

SOC IP Methodology Engineer - Custom SOC

Nvidia is hiring a Senior SOC/IP Methodology Engineer to help design and architect next generation custom SoC/IP..., ICC2, PT-SI, Tempus, Redhawk) etc. Understanding of full flow (including DFT, BIST) to integrate customer and third-party...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 22 Jan 2026

Principal Interconnect Micro-architect and RTL Design Engineer

switch fabrics (coherent and non-coherent) Experience with modern heterogenous systems including CPU, GPU... design, Verilog and SystemVerilog Deep knowledge of front-end tools experience with synthesis, static timing, DFT Exposure...

Posted Date: 17 Dec 2025