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Keywords: CPU Sub-system Design Verification Engineer, Location: Santa Clara, CA

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CPU Sub-system Design Verification Engineer

– A GlobalFoundries company is seeking a Design Verification Engineer with 15+ years of experience to join our CPU verification team. The... successful candidate will work on verification of processor components, focusing on CPU core functionality, coherency, and cache subsystems...

Company: GlobalFoundries
Location: Santa Clara, CA
Posted Date: 12 Mar 2026

Lead CPU Firmware Verification and Validation Engineer/ Manager

& customer satisfaction. As a Lead CPU FW V&V Engineer, you will take on a lead technical role, working closely with cross... that push the limits of performance, energy efficiency, and scalability. Our focus is on developing CPU platform firmware...

Company: Qualcomm
Location: Santa Clara, CA
Posted Date: 01 Mar 2026

Lead CPU Firmware Verification and Validation Engineer/ Manager

Build, manage, and scale a global FW verification and validation organization (Software QA) Be a strong advocate for FW... a collaborative culture that prioritizes innovation, quality, and customer satisfaction Contribute to FW architecture and design...

Company: Qualcomm
Location: Santa Clara, CA
Posted Date: 02 Mar 2026

Infinity Fabric Verification Staff Engineer

: CPU or GPU, Memory sub-system, Fabrics, CPU/GPU coherency, Multimedia, or I/O subsystems. Architected and developed... execution of silicon design and verification closure. KEY RESPONSIBILITIES: Create project schedules and staging plans...

Posted Date: 24 Feb 2026

Senior Verification Engineer

As a member of our CPU Verification Team, you will be responsible for a portion of the Design Verification, focusing... of artificial intelligence. What you'll be doing: Ability to delve into lowest level details of CPU sub-unit design...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 03 Mar 2026

Design Engineer (Low Power)

in PCIE/USB peripherals is preferred Experience in CPU sub system-based design is preferred Experience in low power design..., or related field and 6+ years of ASIC design, verification, validation, integration, or related work experience. OR Master...

Company: Qualcomm
Location: Santa Clara, CA
Posted Date: 02 Mar 2026

Principal Interconnect Micro-architect and RTL Design Engineer

and performance/power. In this role the candidate will work with IP and SOC Architecture team, RTL design team, verification team... and design Work closely with Design teams for Area and Floorplan refinement, Verification Test plan reviews, Timing targets...

Posted Date: 17 Dec 2025