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Keywords: DDR PHY Timing Design Engineer, Location: San Diego, CA

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DDR PHY Timing Design Engineer

DDR technologies. This position requires involvement in static timing analysis (STA) and closure of DDR PHY interface... include: Focused analysis and ownership of specific DDR PHY architecture components for timing closure bottlenecks...

Company: Qualcomm
Location: San Diego, CA
Posted Date: 23 Jan 2026
Salary: $115600 - 173400 per year