Find your dream job now!

Click on Location links to filter by Job Title & Location.
Click on Company links to filter by Company & Location.
For exact match, enclose search terms in "double quotes".

Keywords: Design Engineer/ RTL Engineer, Location: USA

Page: 16

Wireless SoC Design Engineer

team spanning RF/Analog architecture, and design, Systems/PHY/MAC architecture and design, VLSI/RTL design and integration... you to apply. Description Develop microarchitecture and RTL for a System-on-Chip (SoC) IP design, aligning with specified functional requirements...

Company: Apple
Location: San Diego, CA
Posted Date: 10 Jun 2025

Sr. SoC Design Engineer

Familiar with digital design flow, including verilog RTL coding/simulation, synthesis, static timing analysis..., and formality Knowledge of high performance and low power design techniques. Knowledge of FPGA and emulation platforms. Knowledge...

Company: OmniVision
Location: Santa Clara, CA
Posted Date: 08 Jun 2025
Salary: $130600 - 160000 per year

Sr. Engineer, Digital IC Design

provide automotive infotainment and electronic controllers. What You Can Expect Design and implement digital circuits..., and performance. Write and optimize low power Register Transfer Level (RTL) code, implement and simulate digital designs to ensure...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 08 Jun 2025
Salary: $89360 - 133900 per year

Implementation Timing / STA Design Engineer

timing analysis. Collaborate closely with RTL design and physical design teams to identify timing requirements... and bottlenecks. Generate/review, and validate clock domain crossing and design constraints to achieve timing closure of complex SoC...

Company: Qualcomm
Location: Santa Clara, CA
Posted Date: 08 Jun 2025
Salary: $126700 - 190100 per year

Senior ASIC Design Engineer

-architecture specifications and participate in reviews. Implement Verilog RTL to meet timing, performance, and power requirements..., evolve, and support our design methodology. Collaborate with the verification team to address design bugs and close code...

Company: Cisco Systems
Location: San Jose, CA
Posted Date: 06 Jun 2025

SoC Physical Design Verification Engineer

, you'll help design and manufacture our next-generation, high-performance, power-efficient processor, system-on-chip (SoC... of a critical team responsible for physical verification of an SOC. Description - As a member of our physical design team...

Company: Apple
Location: Beaverton, OR
Posted Date: 06 Jun 2025

SoC Physical Design Verification Engineer

, you'll help design and manufacture our next-generation, high-performance, power-efficient processor, system-on-chip (SoC... of a critical team responsible for physical verification of an SOC. Description - As a member of our physical design team...

Company: Apple
Location: San Diego, CA
Posted Date: 06 Jun 2025
Salary: $115700 - 174200 per year

Principal ASIC Design Engineer

optical coherent DSP ASICs · Work with the system architect to define spec/micro-architecture and RTL development · Design... design team, building leading-edge chips for the Coherent Optics market. · Subsystem development in large mixed-signal...

Company: Nokia
Location: USA
Posted Date: 01 Jun 2025

Principal ASIC Design Engineer

optical coherent DSP ASICs · Work with the system architect to define spec/micro-architecture and RTL development · Design... design team, building leading-edge chips for the Coherent Optics market. · Subsystem development in large mixed-signal...

Company: Nokia
Location: USA
Posted Date: 01 Jun 2025

Design Verification Engineer, Senior Staff

with architects/RTL engineers to bring-up a new architecture/micro-architecture on the verification environment. Develop testbench... in ASIC and SOC design blocks. Debug failures in tests and root cause issues with test environment and design. Write...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 29 May 2025
Salary: $124420 - 186400 per year

GPU Physical Design Engineer- Floorplanning

(PPA) targets. The role involves working on cutting-edge technology nodes and applying advanced physical design techniques... responsibilities include: Driving floorplan architecture and optimization in collaboration with RTL and architecture teams...

Company: Qualcomm
Location: San Diego, CA
Posted Date: 28 May 2025
Salary: $108500 - 162700 per year

GPU Design Engineer

, and automotive solutions. What you will be doing : Micro-architect and design RTL for blocks and modules of Adreno GPU... Arithmetic, Low power design, C/C++/Python programming languages is desired. · Experience in designing RTL for GPU, CPU, DSP...

Company: Qualcomm
Location: Boxborough, MA
Posted Date: 18 May 2025

Senior Staff Static Timing Analysis & Physical Design Engineer

: Work with teams across various disciplines such as PD/Digital/RTL/Analog to ensure design convergence and integration... industry standard EDA tools (PrimeTime preferred). Work with RTL design teams to drive assembly and design closure...

Company: Marvell
Location: Boise, ID
Posted Date: 17 May 2025
Salary: $125900 - 186260 per year

Senior Staff Physical Design Engineer

such as Digital/RTL/Analog to ensure design convergence and integration in a timely manner. Implement/support designs with multi... standard EDA tools. Work with RTL design teams to drive assembly and design closure. Provide technical direction, coaching...

Company: Marvell
Location: Boise, ID
Posted Date: 17 May 2025
Salary: $125900 - 186260 per year

Low Power Design/Methodology Engineer

and digital power meter. Perform RTL design, simulation, synthesis, timing analysis, lint check, clock domain crossing check... methodologies covering entire design cycle from RTL to GDS. Analyze how a new methodology will affect different phases of the design...

Company: Qualcomm
Location: San Diego, CA
Posted Date: 15 May 2025

Phyiscal Design Engineer

Perform physical design of 2nm/3nm/5nm mutli-GHz IP for network switch products. Be able to come up with floorplan..., powerplan, cts and routing of the design using state-of-art EDA tools like Innovus. Work closely with designers and must be able...

Company: Broadcom
Location: San Jose, CA
Posted Date: 04 May 2025
Salary: $119000 - 190000 per year

SoC Design Engineer

level design, including hardware C model implementation, micro architecture design, RTL design and hardware/software co... and Organization, and Network Processor Design and Programming. Required Skills: Digital simulator and waveform viewer. RTL...

Company: OmniVision
Location: Santa Clara, CA
Posted Date: 30 Apr 2025
Salary: $151091 - 155000 per year

Verification Silicon Design Engineer

’s graphics processor IP, resulting in no bugs in the final design. THE PERSON: You have a passion for modern, complex... processor architecture, digital design, and verification in general. You are a team player who has excellent communication...

Posted Date: 30 Apr 2025

ASIC Design Engineer

design. You will involve in engineering implementation spec writing from marketing/system requirements, RTL design... and understanding of system design tradeoffs for high volume applications. Must have good RTL experience including specification...

Company: Broadcom
Location: San Jose, CA
Posted Date: 26 Apr 2025
Salary: $119000 - 190000 per year

Fall Co-Op - Digital Design Engineer (FF)

. Implement RTL modules and work with design team with integration and integrated functional verification. Responsibilities.... You will be responsible for assisting in the design of digital logic circuits and digital filters for applications including Mixed Signal...

Company: Cirrus Logic
Location: Austin, TX
Posted Date: 25 Apr 2025