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Keywords: Low Power Design/Methodology Engineer, Location: San Diego, CA

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Low Power Design/Methodology Engineer

, conformal low power check, and formal verification for IP blocks. Work closely with technology/circuit design team to close IP... implementation. Support SoC team to integrate low power / power management IP solution into wireless SoC chips and front-end design...

Company: Qualcomm
Location: San Diego, CA
Posted Date: 15 May 2025

Design Methodology Engineer

concepts and on-hands experience with PTPX etc. ⦁ Sound conceptual understanding of low power design techniques like voltage... Engineering General Summary: Qualcomm’s Design Technology team is seeking a motivated engineer to drive development...

Company: Qualcomm
Location: San Diego, CA
Posted Date: 03 May 2025

Physical Design Methodology CAD Engineer

for design teams. You will collaborate with design teams and tool vendors to improve PPA (Power, Performance, Area) and design... on knowledge of industry standard PNR tools. Hands on experience with high performance and low power implementation flows...

Company: Apple
Location: San Diego, CA
Posted Date: 28 Feb 2025

Physical Design Methodology CAD Engineer

for design teams. You will collaborate with design teams and tool vendors to improve PPA (Power, Performance, Area) and design... verification, EMIR. Hands on experience with high performance and low power implementation flows. Pay & Benefits At Apple...

Company: Apple
Location: San Diego, CA
Posted Date: 28 Feb 2025

SOC Verification and Methodology Engineer

product lines ranging from low power Snapdragon chips to the growing field of Machine Learning (AI/ML) and to Autonomous... and Methodology Engineer, you will be responsible for ensuring the quality and functionality of System-on-Chip (SOC) designs through...

Company: Qualcomm
Location: San Diego, CA
Posted Date: 06 Apr 2025
Salary: $98500 - 147700 per year

Design Verification Engineer

accelerators. Experience with revision control systems like Mercurial(Hg), Git or SVN. Experience with low power design..., and algorithms. As a Design Verification Engineer at Meta Reality Labs, you will work with a world-class group of researchers...

Company: Meta
Posted Date: 08 May 2025

Design Verification Engineer

with revision control systems like Mercurial(Hg), Git or SVN. Experience with low power design. Experience working..., and algorithms. As a Design Verification Engineer at Meta Reality Labs, you will work with a world-class group of researchers...

Company: Meta
Posted Date: 07 May 2025

GNSS Design Verification Engineer

we are passionate about. As a GNSS Design Verification Engineer, you will be responsible for pre-silicon RTL verification of our GNSS IP... coverage model and add test cases to increase coverage. Low power verification and formal verification. Improve DV flow...

Company: Apple
Location: San Diego, CA
Posted Date: 16 Mar 2025

Wireless PHY Design Verification Engineer

! In this role you will be responsible for ASIC pre-silicon verification of our extremely high throughput and low power Wireless... of cutting edge PHY modem hardware including major controllers, blocks, subsystems, wireless protocols, DSP algorithms, low power...

Company: Apple
Location: San Diego, CA
Posted Date: 05 Apr 2025

Custom Circuits Design Engineer

memories, on-chip sensors, ML accelerators data path) used in a high performance / low power SOC. Description Imagine... team to complete the design and oversee the layout quality. - Develop / drive circuit methodology to achieve the highest...

Company: Apple
Location: San Diego, CA
Posted Date: 02 May 2025

Design Verification Engineer

using advanced verification methodology such as SystemVerilog/UVM, Analog/mixed signal simulation, Low power verification..., 0In and others. Preferred Qualifications: Experience with Low power design verification, Formal verification and Gate...

Company: Qualcomm
Location: San Diego, CA
Posted Date: 20 Apr 2025

DFT CAD Engineer

of SoC design, low power, timing exceptions and complex clock structures Strong analytical and debugging experience for ATPG... engineer teams to drive standardization of DFT/ATPG methodology and flow across the company. Work closely with multiple EDA...

Company: Qualcomm
Location: San Diego, CA
Posted Date: 15 May 2025

Sr. SoC Debug Engineer (Server)

Debug Engineer for Server/Compute/Mobile chipsets. Key Responsibilities: In this role, the candidate will support these..., storage devices, power supplies, and networking components. Investigate manufacturing defects, determine root causes...

Company: Qualcomm
Location: San Diego, CA
Posted Date: 03 Apr 2025

DFT Engineer

and verification of advanced DFT/DFD (Design for Test/Design for Debug) techniques for low power, multi voltage designs. The... for Test/Design for Debug) techniques for low power and multi voltage domain designs. A strong fundamental knowledge of DFT...

Company: Qualcomm
Location: San Diego, CA
Posted Date: 02 May 2025
Salary: $98500 - 147700 per year

Senior Engineer

focus on meeting aggressive power and area targets. You will work with engineers to develop and deliver the design and test.... You will make regular contributions to the overall improvement in design methodology to drive productivity and initiatives...

Company: Qualcomm
Location: San Diego, CA
Posted Date: 21 Apr 2025
Salary: $115600 - 173400 per year

DFT Engineer (Server)

and verification of advanced DFT/DFD (Design for Test/Design for Debug) techniques for low power, multi voltage designs. The...) techniques for low power and multi voltage domain designs. A strong fundamental knowledge of DFT is required Understanding...

Company: Qualcomm
Location: San Diego, CA
Posted Date: 10 Apr 2025