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Keywords: Dir, Design Eng, Location: Alabang, Muntinlupa City

Page: 1

Dir, Design Eng

of dedicated/hands-on FPGA/SOC ASIC experience (Design, Verification and Validation) At least 10 years' experience in leading... of 15 years of FPGA IP and system design experience. Independent and self-motivated, capable of executing under dynamic...

Posted Date: 26 Sep 2025