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Keywords: EDA Methodology Architect, Location: Santa Clara, CA

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EDA Methodology Architect

a Senior P&R Methodology Architect to define and own the next generation RTL2GDS flow for advanced nodes (3nm... optimization, including combining the best of external EDA with highly optimized, internal EDA tools. Our team develops these tools...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 09 Jan 2026

Senior SoC Methodology Architect, VLSI Physical Design

Methodology Architect with expertise in floorplanning, early feasibility analysis, placement, routing, and methodology development... and accelerators. Delivering these breakthrough chips requires world-class physical design execution and deep expertise in EDA tool...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 21 Feb 2026

SOC IP Methodology Engineer - Custom SOC

Nvidia is hiring a Senior SOC/IP Methodology Engineer to help design and architect next generation custom SoC/IP... expert, able to traverse from Synthesis to final design closure (timing and layout) involving latest EDA technologies...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 22 Jan 2026

Sr. Staff CPU Physical Design CAD Engineer

Develop, integrate and release new features in our high-performance place-and-route CAD flow Architect and recommend... methodology improvements to ensure our silicon has the best power, performance and area Maintain, support and debug implementation...

Company: Qualcomm
Location: Santa Clara, CA
Posted Date: 02 Mar 2026

Senior Staff Verification Engineer

-power techniques. What You Can Expect In this role, you will architect and develop a functional verification environment..., including reference models and bus-functional monitors and drivers, and contribute to the methodology behind such development...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 27 Feb 2026
Salary: $134390 - 201300 per year

Lead Design Verification Engineer

for the Silicon Chassis team. In this senior technical leadership role, you will architect and deliver next-generation chassis... IPs, designed to scale across multiple product families. You will establish verification strategy and methodology, drive...

Company: Intel
Location: Santa Clara, CA
Posted Date: 26 Feb 2026