High-Speed CMOS DAC/ADC/PLL Analog Design Engineer Locations: Irvine, CA, San Jose, CA or possibly remote US Citizen... implementation Fundamental analog blocks (bandgap references, LDOs, temp sensors, etc) High-speed analog circuit design...
( 10Gbps) ADC and DAC Design High-Speed ( 28GHz) and Low Jitter ( 100fs-rms) PLL Design High Linearity (1-3% THD) Low...In this line of work, the prospective employee will specialize in high-speed analog circuit design for wireline...